Patents by Inventor Juntaro Minezaki

Juntaro Minezaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220391254
    Abstract: An information processing device includes: a memory; and a processor coupled to the memory and configured to: notify a first virtual machine that is an allocation destination of an expansion card of that the expansion card is removed in a pseudo manner in a case where an operation on the expansion card mounted on an expansion slot of the information processing device is requested; switch the allocation destination of the expansion card from the first virtual machine to a second virtual machine dedicated to setting in a case where the removal of the expansion card is notified in the pseudo manner; switch the allocation destination of the expansion card from the second virtual machine to the first virtual machine in a case where the operation on the expansion card ends; and notify the first virtual machine of that the expansion card after the operation end is inserted.
    Type: Application
    Filed: August 3, 2022
    Publication date: December 8, 2022
    Applicant: FUJITSU LIMITED
    Inventors: Juntaro Minezaki, KENICHIRO TAKEDA
  • Publication number: 20220357976
    Abstract: An information processing apparatus includes: a memory; and a processor coupled to the memory and configured to: execute an operating system; manage an operation of the information processing apparatus; issue, on the basis of detection of connection of a device, an acquisition instruction to acquire device information of the device; acquire, while the operating system is being executed, the device information from the device on the basis of the acquisition instruction; and notify the acquired device information.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 10, 2022
    Applicant: FUJITSU LIMITED
    Inventors: KENICHIRO TAKEDA, Juntaro Minezaki
  • Patent number: 9792142
    Abstract: A device includes a storage which has stored therein setting information that specifies, for each virtual machine to be created, the number of arithmetic processing unit cores that have to be allocated to a virtual machine, and group information that represents a plurality of virtual machines operating in cooperation as a group, from among the virtual machines represented by the setting information, and a virtual machine monitor, when a first virtual machine has been created, from among the virtual machines represented by the setting information, which refers to the setting information and the group information so as to allocate as many arithmetic processing unit cores as the setting information specifies to the first virtual machine, according to a rule that takes account of a decrease in operation performance of all the operable virtual machines that is associated with a failure occurring in any of the arithmetic processing units.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: October 17, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Juntaro Minezaki
  • Patent number: 9747114
    Abstract: A SBSP writes a log into a spad in a log processor and the writing of the log from the spad to a serial port is performed by the log processor. When initialization of a main memory has been completed, the log processor temporarily writes the data read from the spad into a logmem and then clears the spad. Furthermore, when an output of the log performed by the log processor has been completed, the SBSP adds, in cooperation with the BIOS and the OS, the log processor and the logmem as the resources.
    Type: Grant
    Filed: September 10, 2014
    Date of Patent: August 29, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Minoru Kawarabayashi, Makoto Kozawa, Yusuke Kudo, Juntaro Minezaki, Masakazu Yabe
  • Patent number: 9298663
    Abstract: An information processing apparatus includes an interface configured to be connected with a connection apparatus, an acquisition unit configured to acquire apparatus information including a configuration or an operation specification of the connection apparatus connected with the interface, a determination unit configured to determine a control program to control the connection apparatus according to the apparatus information, and a control unit configured to use the determined control program to control the connection apparatus, wherein the connection apparatus includes an expansion connection unit and an expansion apparatus connected with the expansion connection unit, and the acquisition unit includes a first acquisition unit configured to acquire first information including a configuration or an operation specification of the expansion connection unit connected with the interface, and a second acquisition unit configured to acquire second information including a configuration or an operation specification
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: March 29, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Juntaro Minezaki, Masashi Agata, Shinji Hiyama
  • Publication number: 20160004554
    Abstract: A device includes a storage which has stored therein setting information that specifies, for each virtual machine to be created, the number of arithmetic processing unit cores that have to be allocated to a virtual machine, and group information that represents a plurality of virtual machines operating in cooperation as a group, from among the virtual machines represented by the setting information, and a virtual machine monitor, when a first virtual machine has been created, from among the virtual machines represented by the setting information, which refers to the setting information and the group information so as to allocate as many arithmetic processing unit cores as the setting information specifies to the first virtual machine, according to a rule that takes account of a decrease in operation performance of all the operable virtual machines that is associated with a failure occurring in any of the arithmetic processing units.
    Type: Application
    Filed: September 11, 2015
    Publication date: January 7, 2016
    Inventor: Juntaro Minezaki
  • Publication number: 20150127931
    Abstract: A SBSP writes a log into a spad in a log processor and the writing of the log from the spad to a serial port is performed by the log processor. When initialization of a main memory has been completed, the log processor temporarily writes the data read from the spad into a logmem and then clears the spad. Furthermore, when an output of the log performed by the log processor has been completed, the SBSP adds, in cooperation with the BIOS and the OS, the log processor and the logmem as the resources.
    Type: Application
    Filed: September 10, 2014
    Publication date: May 7, 2015
    Applicant: Fujitsu Limited
    Inventors: Minoru KAWARABAYASHI, Makoto Kozawa, Yusuke Kudo, Juntaro Minezaki, Masakazu Yabe
  • Publication number: 20140108693
    Abstract: An information processing apparatus includes an interface configured to be connected with a connection apparatus, an acquisition unit configured to acquire apparatus information including a configuration or an operation specification of the connection apparatus connected with the interface, a determination unit configured to determine a control program to control the connection apparatus according to the apparatus information, and a control unit configured to use the determined control program to control the connection apparatus, wherein the connection apparatus includes an expansion connection unit and an expansion apparatus connected with the expansion connection unit, and the acquisition unit includes a first acquisition unit configured to acquire first information including a configuration or an operation specification of the expansion connection unit connected with the interface, and a second acquisition unit configured to acquire second information including a configuration or an operation specification
    Type: Application
    Filed: December 10, 2013
    Publication date: April 17, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Juntaro Minezaki, Masashi AGATA, Shinji Hiyama