Patents by Inventor Junwei LIAN

Junwei LIAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory allocation method and apparatus, electronic device, and storage medium
    Patent number: 11989420
    Abstract: The present disclosure relates to the technical field of system-level memory test, and in particular, to a memory allocation method and apparatus, an electronic device, and a computer-readable storage medium.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: May 21, 2024
    Assignee: Changxin Memory Technologies, Inc.
    Inventor: Junwei Lian
  • MEMORY ALLOCATION METHOD AND APPARATUS, ELECTRONIC DEVICE, AND STORAGE MEDIUM
    Publication number: 20230266883
    Abstract: The present disclosure relates to the technical field of system-level memory test, and in particular, to a memory allocation method and apparatus, an electronic device, and a computer-readable storage medium.
    Type: Application
    Filed: June 30, 2022
    Publication date: August 24, 2023
    Inventor: Junwei LIAN
  • Semiconductor memory training methods and related devices
    Patent number: 11631451
    Abstract: A semiconductor memory training method includes: selecting two adjacent reference voltages from a plurality of reference voltages as a first reference voltage and a second reference voltage; obtaining a first minimum margin value for the plurality of target signal lines under the first reference voltage; obtaining a second minimum margin value for the plurality of target signal lines under the second reference voltage, according to a minimum margin value for each target signal line under the second reference voltage; determining a target interval for an expected margin value according to the first minimum margin value and the second minimum margin value, the expected margin value being the maximum one among the minimum margin values for the plurality of target signal lines under the plurality of reference voltages; and searching for the expected margin value in the target interval.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: April 18, 2023
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Guangteng Long, Xiaofeng Xu, Junwei Lian
  • SEMICONDUCTOR MEMORY TRAINING METHODS AND RELATED DEVICES
    Publication number: 20220319568
    Abstract: A semiconductor memory training method includes: selecting two adjacent reference voltages from a plurality of reference voltages as a first reference voltage and a second reference voltage; obtaining a first minimum margin value for the plurality of target signal lines under the first reference voltage; obtaining a second minimum margin value for the plurality of target signal lines under the second reference voltage, according to a minimum margin value for each target signal line under the second reference voltage; determining a target interval for an expected margin value according to the first minimum margin value and the second minimum margin value, the expected margin value being the maximum one among the minimum margin values for the plurality of target signal lines under the plurality of reference voltages; and searching for the expected margin value in the target interval.
    Type: Application
    Filed: March 9, 2021
    Publication date: October 6, 2022
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Guangteng LONG, Xiaofeng XU, Junwei LIAN