Abstract: The present invention provides a semiconductor device which comprises a substrate, a first semiconductor chip on a substrate, a second semiconductor chip on the first semiconductor chip, and an adhesive sheet between the first and second semiconductor chips. The second semiconductor chip has a mirrored back surface, and the adhesive sheet contains a metal impurity ion trapping agent.

Abstract: A wire bonding method involves bonding a wire in order at a first bonding point and a second bonding point; raising a capillary, through which the wire is inserted, on the second bonding point; cutting the wire by closing a clamper provided above the capillary at a time when the capillary has reached a prescribed height; and measuring a load incurred on the wire at a time of cutting of the wire.

Abstract: A method for manufacturing a stacked semiconductor package where a plurality of semiconductor chips are stacked on a substrate, including: forming insulating layers at portions of a wafer corresponding to sides of the plurality of semiconductor chips when the plurality of semiconductor chips are in the wafer; processing the wafer so as to obtain the plurality of semiconductor chips; subsequently stacking the plurality of semiconductor chips on the substrate such that the insulating layers formed at the sides of the plurality of semiconductor chips are respectively positioned at the same side as one another; and forming a wiring over the insulating layers formed at the sides of the plurality of semiconductor chips so that the plurality of semiconductor chips are electrically connected with one another and one or more of the plurality of semiconductor chips are electrically connected with the substrate.

Abstract: A method for manufacturing a stacked semiconductor package where a plurality of semiconductor chips are stacked on a substrate, including: forming insulating layers at portions of a wafer corresponding to sides of the plurality of semiconductor chips when the plurality of semiconductor chips are in the wafer; processing the wafer so as to obtain the plurality of semiconductor chips; subsequently stacking the plurality of semiconductor chips on the substrate such that the insulating layers formed at the sides of the plurality of semiconductor chips are respectively positioned at the same side as one another; and forming a wiring over the insulating layers formed at the sides of the plurality of semiconductor chips so that the plurality of semiconductor chips are electrically connected with one another and one or more of the plurality of semiconductor chips are electrically connected with the substrate.

Abstract: The present invention provides a semiconductor device which comprises a substrate, a first semiconductor chip on a substrate, a second semiconductor chip on the first semiconductor chip, and an adhesive sheet between the first and second semiconductor chips. The second semiconductor chip has a mirrored back surface, and the adhesive sheet contains a metal impurity ion trapping agent.

Abstract: Chips are stacked and mounted on a circuit board having external connection electrodes and mounted thereon by wire bonding. At least one of the chips stacked on the chip includes overhung portions each of which has a start point inside bonding pads, is made thinner in a direction towards the outer periphery to an end point reaching the side wall and forms a space used to accommodate ball bonding portions between the overhung portion and the main surface of the chip arranged in the lower stage on a backside corresponding in position to the bonding pads, and insulating members formed to cover the overhung portions and prevent bonding wires of the chip arranged in the lower stage from being brought into contact with the upper-stage chip.

Abstract: An apparatus for manufacturing a semiconductor device, includes: a collet; an alignment stage; and a sheet feeding mechanism. The collet is configured to suck a surface of a semiconductor chip. The surface is on opposite side of a bonding surface to be bonded to a bonding target. The bonding surface is provided with a film-like adhesive layer. The collet includes a heater for heating the adhesive layer. The alignment stage is configured to support the semiconductor chip and to correct position of the semiconductor chip. The sheet feeding mechanism is configured to feed a release sheet onto the alignment stage.

Abstract: According to one embodiment, a manufacturing method of a semiconductor device includes forming a plurality of first trenches in a semiconductor substrate, forming an insulating member in the first trenches, removing a part of a portion of the insulating member, forming second trenches in the insulating member, and attaching a protection film. The semiconductor substrate has a first and a second main surface. The insulating member has an upper face located higher than the first main surface. The portion is located higher than the first main surface.

Abstract: A wire bonding method involves bonding a wire in order at a first bonding point and a second bonding point; raising a capillary, through which the wire is inserted, on the second bonding point; cutting the wire by closing a clamper provided above the capillary at a time when the capillary has reached a prescribed height; and measuring a load incurred on the wire at a time of cutting of the wire

Abstract: Chips are stacked and mounted on a circuit board having external connection electrodes and mounted thereon by wire bonding. At least one of the chips stacked on the chip includes overhung portions each of which has a start point inside bonding pads, is made thinner in a direction towards the outer periphery to an end point reaching the side wall and forms a space used to accommodate ball bonding portions between the overhung portion and the main surface of the chip arranged in the lower stage on a backside corresponding in position to the bonding pads, and insulating members formed to cover the overhung portions and prevent bonding wires of the chip arranged in the lower stage from being brought into contact with the upper-stage chip.

Abstract: Chips are stacked and mounted on a circuit board having external connection electrodes and mounted thereon by wire bonding. At least one of the chips stacked on the chip includes overhung portions each of which has a start point inside bonding pads, is made thinner in a direction towards the outer periphery to an end point reaching the side wall and forms a space used to accommodate ball bonding portions between the overhung portion and the main surface of the chip arranged in the lower stage on a backside corresponding in position to the bonding pads, and insulating members formed to cover the overhung portions and prevent bonding wires of the chip arranged in the lower stage from being brought into contact with the upper-stage chip.

Abstract: A semiconductor device has a plurality of bare chips stacked on at least one of first and second main surfaces oppositely arranged on a support substrate, spacers arranged between two bare chips arranged adjacently in up and down direction among the plurality of bare chips, and inner leads which are arranged at both sides in a horizontal direction of the support substrate and are connected to pads of the bare chips via bonding wires, wherein the bonding wires which connect the pads of the bare chips at one end side of the spacers to the corresponding inner leads, are arranged not to contact the bare chip at the other end side of the same spacer.

Abstract: A method for manufacturing a stacked semiconductor package where a plurality of semiconductor chips are stacked on a substrate, including: forming insulating layers at portions of a wafer corresponding to sides of the plurality of semiconductor chips when the plurality of semiconductor chips are in the wafer; processing the wafer so as to obtain the plurality of semiconductor chips; subsequently stacking the plurality of semiconductor chips on the substrate such that the insulating layers formed at the sides of the plurality of semiconductor chips are respectively positioned at the same side as one another; and forming a wiring over the insulating layers formed at the sides of the plurality of semiconductor chips so that the plurality of semiconductor chips are electrically connected with one another and one or more of the plurality of semiconductor chips are electrically connected with the substrate.

Abstract: An apparatus for manufacturing a semiconductor device, includes: a collet; an alignment stage; and a sheet feeding mechanism. The collet is configured to suck a surface of a semiconductor chip. The surface is on opposite side of a bonding surface to be bonded to a bonding target. The bonding surface is provided with a film-like adhesive layer. The collet includes a heater for heating the adhesive layer. The alignment stage is configured to support the semiconductor chip and to correct position of the semiconductor chip. The sheet feeding mechanism is configured to feed a release sheet onto the alignment stage.

Abstract: A wire bonding apparatus comprising: a capillary configured to have inserted therethrough a wire; a damper provided above the capillary and able to clamp hold the wire; and a load sensor configured to measure load incurred on the wire.

Abstract: A semiconductor package includes a circuit board having connection pads formed on a front and back surfaces, and a wiring network connected to these connection pads, as a package base. Metal bumps connected to at least part of the connection pads on the front and back surfaces via the wiring network are formed on the back surface of the circuit board as external connection terminals. One or a plurality of semiconductor elements electrically connected to the connection pad on the front surface side is or are mounted on a first element mounting part provided on the front surface side of the circuit board. One or plurality of semiconductor elements electrically connected to the connection pad on the back surface side is or are mounted on a second element mounting part provided on the back surface side of the circuit board.

Abstract: A semiconductor package includes a lead frame having an element mounting part and a lead part. A first semiconductor element and a second semiconductor element are sequentially stacked on a principal surface at least on one side of the element mounting part. An insulating resin layer serving as a second adhesive layer is filled between the first semiconductor element and the second semiconductor element. An element-side end portion of a first bonding wire connected to the first semiconductor element is buried in the insulating resin layer.

Abstract: A semiconductor device has a plurality of bare chips stacked on at least one of first and second main surfaces oppositely arranged on a support substrate, spacers arranged between two bare chips arranged adjacently in up and down direction among the plurality of bare chips, and inner leads which are arranged at both sides in a horizontal direction of the support substrate and are connected to pads of the bare chips via bonding wires, wherein the bonding wires which connect the pads of the bare chips at one end side of the spacers to the corresponding inner leads, are arranged not to contact the bare chip at the other end side of the same spacer.

Abstract: Chips are stacked and mounted on a circuit board having external connection electrodes and mounted thereon by wire bonding. At least one of the chips stacked on the chip includes overhung portions each of which has a start point inside bonding pads, is made thinner in a direction towards the outer periphery to an end point reaching the side wall and forms a space used to accommodate ball bonding portions between the overhung portion and the main surface of the chip arranged in the lower stage on a backside corresponding in position to the bonding pads, and insulating members formed to cover the overhung portions and prevent bonding wires of the chip arranged in the lower stage from being brought into contact with the upper-stage chip.