Abstract: A voltage of a battery cell is measured with a high accuracy. According to one embodiment, a process of measuring a voltage of a battery cell 21a in a first semiconductor chip 31, a process of measuring a temperature of a battery monitoring unit 31b in the first semiconductor chip 31, a process of acquiring the voltage of the battery cell 21a from the first semiconductor chip 31 in a second semiconductor chip 32, a process of acquiring the temperature of the battery monitoring unit 31b from the first semiconductor chip 31 in the second semiconductor chip 32, and a process of calculating a correction value of the voltage of the battery cell 21a based on the temperature of the battery monitoring unit 31b and voltage correction data to correct a voltage measurement error of the battery cell 21a according to a change in the temperature of the battery monitoring unit 31b and correcting the voltage of the battery cell 21a based on the correction value in the second semiconductor chip 32 are included.

Abstract: A data line driving circuit for a liquid crystal display device comprising: a plurality of first data lines applied with a positive potential, a plurality of second data lines applied with a negative potential, comparison units that compare with a reference voltage at least one of a potential at a first common line connected to the plurality of first data lines and a potential at a second common line connected to the plurality of second data lines, and switches that are controlled so that the first data lines and the second data lines are set to a connection state or an interruption state according to a comparison result by the comparison units.

Abstract: A data line drive circuit includes a plurality of output circuits and a plurality of switch portions. The plurality of output circuits outputs voltages corresponding to grayscale voltages with respect to display data. The plurality of switch portions becomes an ON-state in response to a line output signal and connects the plurality of output circuits and a plurality of data lines, respectively. ON-resistance values of at least part of the plurality of switch portions vary in the ON-state.

Abstract: A liquid crystal display apparatus includes a plurality of data lines; a plurality of scan lines which intersect the plurality of data lines; pixels arranged at intersections of the plurality of data lines and the plurality of scanning lines; and a data line driving circuit configured to drive the plurality of data lines, and comprising a first data line driving section and a second data line driving section. 4×n (n: an optional natural number) frames are set as one cycle, and each of the plurality of data lines is circularly driven by one of the first data line driving section and the second data line driving section during one cycle.

Abstract: A driving circuit according to an embodiment of the invention includes: a switching unit for sequentially switching between a first operation of applying a positive gray-scale voltage to odd-numbered data lines and applying a negative gray-scale voltage to even-numbered data lines and a second operation of applying a negative gray-scale voltage to odd-numbered data lines and applying a positive gray-scale voltage to the even-numbered data lines; a plurality of short-circuit switches for short-circuiting a pair of adjacent odd-numbered data lines and a pair of adjacent even-numbered data lines to produce a plurality of pairs of short-circuited data lines in a switching period between the first operation and the second operation; and a plurality of common node-connected switches corresponding to the plurality of data line pairs and short-circuiting a corresponding one of the data line pairs to a common node.

Abstract: A data line driving circuit for a liquid crystal display device comprising: a plurality of first data lines applied with a positive potential, a plurality of second data lines applied with a negative potential, comparison units that compare with a reference voltage at least one of a potential at a first common line connected to the plurality of first data lines and a potential at a second common line connected to the plurality of second data lines, and switches that are controlled so that the first data lines and the second data lines are set to a connection state or an interruption state according to a comparison result by the comparison units.

Abstract: An amplifier in an embodiment of the present invention has MOS transistors connected serially between a power supply VDD and a ground terminal GND; an output terminal Vout connected to a node provided between the MOS transistors; a first mirror capacity provided between the gate of a MOS transistor and the output terminal Vout; and a second mirror capacity provided between the gate of another MOS transistor and the output terminal Vout. The amplifier further includes a first switching circuit for connecting one end of the first mirror capacity to the power supply terminal VDD or to the gate of a MOS transistor; and a second switching circuit for connecting one end of the second mirror capacity to the ground terminal GND or to the gate of another MOS transistor.

Abstract: A data line drive circuit includes a plurality of output circuits and a plurality of switch portions. The plurality of output circuits outputs voltages corresponding to grayscale voltages with respect to display data. The plurality of switch portions becomes an ON-state in response to a line output signal and connects the plurality of output circuits and a plurality of data lines, respectively. ON-resistance values of at least part of the plurality of switch portions vary in the ON-state.

Abstract: An amplifier in an embodiment of the present invention has MOS transistors connected serially between a power supply VDD and a ground terminal GND; an output terminal Vout connected to a node provided between the MOS transistors; a first mirror capacity provided between the gate of a MOS transistor and the output terminal Vout; and a second mirror capacity provided between the gate of another MOS transistor and the output terminal Vout. The amplifier further includes a first switching circuit for connecting one end of the first mirror capacity to the power supply terminal VDD or to the gate of a MOS transistor; and a second switching circuit for connecting one end of the second mirror capacity to the ground terminal GND or to the gate of another MOS transistor.

Abstract: A driving circuit according to an embodiment of the invention includes: a switching unit for sequentially switching between a first operation of applying a positive gray-scale voltage to odd-numbered data lines and applying a negative gray-scale voltage to even-numbered data lines and a second operation of applying a negative gray-scale voltage to odd-numbered data lines and applying a positive gray-scale voltage to the even-numbered data lines; a plurality of short-circuit switches for short-circuiting a pair of adjacent odd-numbered data lines and a pair of adjacent even-numbered data lines to produce a plurality of pairs of short-circuited data lines in a switching period between the first operation and the second operation; and a plurality of common node-connected switches corresponding to the plurality of data line pairs and short-circuiting a corresponding one of the data line pairs to a common node.

Abstract: A liquid crystal display apparatus includes a plurality of data lines; a plurality of scan lines which intersect the plurality of data lines; pixels arranged at intersections of the plurality of data lines and the plurality of scanning lines; and a data line driving circuit configured to drive the plurality of data lines, and comprising a first data line driving section and a second data line driving section. 4×n (n: an optional natural number) frames are set as one cycle, and each of the plurality of data lines is circularly driven by one of the first data line driving section and the second data line driving section during one cycle.