Patents by Inventor Junyan TANG

Junyan TANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136270
    Abstract: An enhanced integrated circuit interconnect package, method and multiple-layer integrated circuit laminate structure enable increased routing density per layer and maintains signal integrity performance. A differential signal via pair of vertical interconnect vias provide differential signaling. The vias of the differential signal via pair are positioned closely spaced together with each via offset from a center axis of an associated LGA contact, minimizing space between the differential signal vias and maintaining signal integrity performance, and providing increased available wiring signal channel.
    Type: Application
    Filed: October 23, 2022
    Publication date: April 25, 2024
    Inventors: Francesco PREDA, Sungjun CHUN, Jose A. HEJASE, Junyan TANG, Pavel ROY PALADHI, Nam Huu PHAM, Wiren Dale BECKER, Daniel Mark DREPS
  • Publication number: 20240092138
    Abstract: A thermal management system includes a heat pump, a battery waterway, a heat exchange waterway, a heat dissipator waterway, an electric assembly waterway, a first heat exchanger, and a control valve group. A first heat exchange path of the first heat exchanger is connected to the heat pump, and a second heat exchange path of the first heat exchanger is connected to the heat exchange waterway. The electric assembly waterway may be connected to the heat dissipator waterway or the heat exchange waterway in series. The battery waterway may be connected to the heat dissipator waterway or the heat exchange waterway in series. The battery waterway, the heat exchange waterway, the heat dissipator waterway, and the electric assembly waterway may be connected in series.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Inventors: Dongsheng YANG, Yunhui BAI, Junyan ZHANG, Shangzhong ZHAO, Yifeng TANG
  • Publication number: 20230420394
    Abstract: A multi-chip package structure is provided. The multi-chip package structure includes a first IC chip and a second IC chip, and a fluid conduit thermally coupled to the first IC chip and the second IC chip. The multi-chip package structure is configured to remove heat generated by at least one of the first IC chip and the second IC chip. The fluid conduit has a first end and a second end opposite to the first end. The multi-chip package structure also includes a first monopole feed connected between the first IC chip and the first end of the fluid conduit, and a second monopole feed connected between the second IC chip and the second end of the fluid conduit. The first monopole feed is configured to transmit an electromagnetic signal through the fluid conduit toward the second monopole feed and vice versa.
    Type: Application
    Filed: June 22, 2022
    Publication date: December 28, 2023
    Inventors: Anil Yuksel, Jose A. Hejase, Junyan Tang, Pavel Roy Paladhi, Joshua Myers
  • Patent number: 11658378
    Abstract: Methods and apparatuses for vertically transitioning signals between substrate integrated waveguides within a multilayered printed circuit board (PCB) are disclosed. A first substrate integrated waveguide (SIW) is provided in a first layer of the PCB, the first SIW having a first terminal portion. A second SIW is provided in a second layer of the PCB, the second SIW having a second terminal portion that overlaps with the first terminal portion, wherein a first ground plane separates the first SIW and the second SIW. A vertical transition comprising an aperture in the first ground plane that is disposed in an area defined by the overlap of the first terminal portion and the second terminal portion, such that a signal propagated in the first SIW transitions to the second SIW in a different layer through the aperture.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: May 23, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joshua C. Myers, Jose A. Hejase, Junyan Tang, Pavel Roy Paladhi, Wiren D. Becker, Sungjun Chun, Daniel M. Dreps
  • Patent number: 11399428
    Abstract: A printed circuit board (‘PCB’) including a substrate integrated waveguide (‘SIW’) formed using two ground planes representing the top and bottom walls of the waveguide, tightly pitched ground vias to act as two side walls and two back walls, and a pair of monopole antennas placed at each end of the SIW acting as signal feeding/receiving structures is disclosed. The waveguide dominant mode cut off frequency is determined by the spacing between the two side walls. Within each monopole antenna pair, the first monopole antenna operates at a first frequency while the second monopole antenna operates at another frequency. For each monopole antenna pair, the first monopole antenna and the second monopole antenna are located in the SIW at a distance from the back wall optimal for each operating frequency.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: July 26, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Pavel Roy Paladhi, Jose A. Hejase, Junyan Tang, Joshua C. Myers, Sungjun Chun, Wiren D. Becker, Daniel M. Dreps
  • Publication number: 20210112655
    Abstract: A printed circuit board (‘PCB’) including a substrate integrated waveguide (‘SIW’) formed using two ground planes representing the top and bottom walls of the waveguide, tightly pitched ground vias to act as two side walls and two back walls, and a pair of monopole antennas placed at each end of the SIW acting as signal feeding/receiving structures is disclosed. The waveguide dominant mode cut off frequency is determined by the spacing between the two side walls. Within each monopole antenna pair, the first monopole antenna operates at a first frequency while the second monopole antenna operates at another frequency. For each monopole antenna pair, the first monopole antenna and the second monopole antenna are located in the SIW at a distance from the back wall optimal for each operating frequency.
    Type: Application
    Filed: October 14, 2019
    Publication date: April 15, 2021
    Inventors: Pavel ROY PALADHI, Jose A. Hejase, Junyan Tang, Joshua C. Myers, Sungjun Chun, Wiren D. Becker, Daniel M. Dreps
  • Publication number: 20210111472
    Abstract: Methods and apparatuses for vertically transitioning signals between substrate integrated waveguides within a multilayered printed circuit board (PCB) are disclosed. A first substrate integrated waveguide (SIW) is provided in a first layer of the PCB, the first SIW having a first terminal portion. A second SIW is provided in a second layer of the PCB, the second SIW having a second terminal portion that overlaps with the first terminal portion, wherein a first ground plane separates the first SIW and the second SIW. A vertical transition comprising an aperture in the first ground plane that is disposed in an area defined by the overlap of the first terminal portion and the second terminal portion, such that a signal propagated in the first SIW transitions to the second SIW in a different layer through the aperture.
    Type: Application
    Filed: October 14, 2019
    Publication date: April 15, 2021
    Inventors: JOSHUA C. MYERS, JOSE A. HEJASE, JUNYAN TANG, PAVEL ROY PALADHI, WIREN D. BECKER, SUNGJUN CHUN, DANIEL M. DREPS
  • Patent number: 10879575
    Abstract: A method and apparatus for attenuating crosstalk between dielectric waveguides is provided. A first dielectric waveguide is formed to carry a first frequency band. A first filter is embedded within the first dielectric waveguide to attenuate transmission of a second frequency band through the first dielectric waveguide. The filter comprises alternating sections of a first dielectric material and a second dielectric material having different dielectric constants. The length of each section of the first and second dielectric materials is equal to a quarter of the wavelength of the central frequency of the second frequency band. A second waveguide is formed to carry the second frequency band. A second filter is embedded in the second dielectric waveguide to attenuate transmission of the first frequency band through the second dielectric waveguide. A cladding is disposed between the first and second waveguides.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: December 29, 2020
    Assignee: International Business Machines Corporation
    Inventors: Joshua Myers, Jose A. Hejase, Junyan Tang, Daniel M. Dreps
  • Publication number: 20200112075
    Abstract: A method and apparatus for attenuating crosstalk between dielectric waveguides is provided. A first dielectric waveguide is formed to carry a first frequency band. A first filter is embedded within the first dielectric waveguide to attenuate transmission of a second frequency band through the first dielectric waveguide. The filter comprises alternating sections of a first dielectric material and a second dielectric material having different dielectric constants. The length of each section of the first and second dielectric materials is equal to a quarter of the wavelength of the central frequency of the second frequency band. A second waveguide is formed to carry the second frequency band. A second filter is embedded in the second dielectric waveguide to attenuate transmission of the first frequency band through the second dielectric waveguide. A cladding is disposed between the first and second waveguides.
    Type: Application
    Filed: October 4, 2018
    Publication date: April 9, 2020
    Inventors: Joshua Myers, Jose A. Hejase, Junyan Tang, Daniel M. Dreps
  • Patent number: 10199706
    Abstract: Embodiments herein describe a high-speed communication channel in a PCB that includes a dielectric waveguide sandwiched between two ground layers. The dielectric waveguide includes a core and a cladding where the material of the core has a higher dielectric constant than the material of the cladding. Thus, electromagnetic signals propagating in the core are internally reflected at the interface between the core and cladding such that the electromagnetic signals are primary contained in the core.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: February 5, 2019
    Assignee: International Business Machines Corporation
    Inventors: Samuel R. Connor, Daniel M. Dreps, Jose A. Hejase, Joseph Kuczynski, Joshua C. Myers, Junyan Tang
  • Patent number: 10181628
    Abstract: Embodiments herein describe a high-speed communication channel in a PCB that includes a dielectric waveguide sandwiched between two ground layers. The dielectric waveguide includes a core and a cladding where the material of the core has a higher dielectric constant than the material of the cladding. Thus, electromagnetic signals propagating in the core are internally reflected at the interface between the core and cladding such that the electromagnetic signals are primary contained in the core.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: January 15, 2019
    Assignee: International Business Machines Corporation
    Inventors: Daniel M. Dreps, Jose A. Hejase, Joshua C. Myers, Junyan Tang
  • Patent number: 10141623
    Abstract: Embodiments herein describe a high-speed communication channel in a PCB that includes a dielectric waveguide coupled at respective ends to coaxial vias. The dielectric waveguide includes a core and a cladding where the material of the core has a higher dielectric constant than the material of the cladding. Thus, electromagnetic signals propagating in the core are internally reflected at the interface between the core and cladding such that the electromagnetic signals are primary contained in the core. The coaxial vias include a center conductor and an outer conductor (or shield) which extend through one or more layers of the PCB. One of the coaxial vias radiates electromagnetic signals into the dielectric waveguide at a first end of the core while the other coaxial via receives the radiated signals at a second end of the core.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: November 27, 2018
    Assignee: International Business Machines Corporation
    Inventors: Samuel R. Connor, Jose A. Hejase, Joseph Kuczynski, Joshua C. Myers, Junyan Tang
  • Publication number: 20180115043
    Abstract: Embodiments herein describe a high-speed communication channel in a PCB that includes a dielectric waveguide sandwiched between two ground layers. The dielectric waveguide includes a core and a cladding where the material of the core has a higher dielectric constant than the material of the cladding. Thus, electromagnetic signals propagating in the core are internally reflected at the interface between the core and cladding such that the electromagnetic signals are primary contained in the core.
    Type: Application
    Filed: October 21, 2016
    Publication date: April 26, 2018
    Inventors: Daniel M. DREPS, Jose A. HEJASE, Joshua C. MYERS, Junyan TANG
  • Publication number: 20180115042
    Abstract: Embodiments herein describe a high-speed communication channel in a PCB that includes a dielectric waveguide sandwiched between two ground layers. The dielectric waveguide includes a core and a cladding where the material of the core has a higher dielectric constant than the material of the cladding. Thus, electromagnetic signals propagating in the core are internally reflected at the interface between the core and cladding such that the electromagnetic signals are primary contained in the core.
    Type: Application
    Filed: October 21, 2016
    Publication date: April 26, 2018
    Inventors: Samuel R. CONNOR, Daniel M. DREPS, Jose A. HEJASE, Joseph KUCZYNSKI, Joshua C. MYERS, Junyan TANG
  • Publication number: 20180113974
    Abstract: Mechanisms are provided for implementing a skew rate artificial neural network (ANN). The mechanisms generate a training dataset for training the skew rate ANN. The training dataset comprises a plurality of sets of data and each set of data corresponds to a particular set of printed circuit board (PCB) and communication channel characteristics. The mechanisms train the skew rate ANN based on the training dataset to generate a trained skew rate ANN. The mechanisms then receive an input dataset representing a set of PCB and communication channel characteristics for a PCB design. The trained skew rate ANN generates a predicted skew factor for the PCB design based on the input dataset. The predicted skew factor is then output to a PCB design tool to modify the PCB design based on the predicted skew factor.
    Type: Application
    Filed: October 21, 2016
    Publication date: April 26, 2018
    Inventors: Dylan J. Boday, Zhaoqing Chen, Jose A. Hejase, Roger S. Krabbenhoft, Pavel Roy Paladhi, Junyan Tang
  • Publication number: 20180108971
    Abstract: Embodiments herein describe a high-speed communication channel in a PCB that includes a dielectric waveguide coupled at respective ends to coaxial vias. The dielectric waveguide includes a core and a cladding where the material of the core has a higher dielectric constant than the material of the cladding. Thus, electromagnetic signals propagating in the core are internally reflected at the interface between the core and cladding such that the electromagnetic signals are primary contained in the core. The coaxial vias include a center conductor and an outer conductor (or shield) which extend through one or more layers of the PCB. One of the coaxial vias radiates electromagnetic signals into the dielectric waveguide at a first end of the core while the other coaxial via receives the radiated signals at a second end of the core.
    Type: Application
    Filed: October 17, 2016
    Publication date: April 19, 2018
    Inventors: Samuel R. CONNOR, Jose A. HEJASE, Joseph KUCZYNSKI, Joshua C. Myers, Junyan TANG