Patents by Inventor Junyi Zhang
Junyi Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250084048Abstract: The present disclosure relates to novel compounds and pharmaceutical compositions thereof, and methods for inhibiting the activity of PI3Ka enzymes with the compounds and compositions of the disclosure. The present disclosure further relates to, but is not limited to, methods for treating disorders associated with PI3Ka signaling with the compounds and compositions of the disclosure.Type: ApplicationFiled: October 7, 2022Publication date: March 13, 2025Inventors: Alessandro BOEZIO, Alexander M. TAYLOR, Junyi ZHANG, Kelley c. SHORTSLEEVES, Levi Charles Thomas PIERCE, Thomas H. MCLEAN, Anna KAPLAN, Amaƫl MADEC, Brandi M. HUDSON, Jun MA, Yue PAN, Gaetan MAERTENS, Johanne OUTIN
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Patent number: 12093240Abstract: Techniques manage log data. Such techniques involve receiving log data describing a state of an application system at a target time point. Such techniques further involve determining whether a level of the log data satisfies a predetermined level. Such techniques further involve, in response to determining that the level of the log data satisfies the predetermined level, storing log data within a predetermined range adjacent to the target time point to a log repository of the application system, the predetermined range indicating the amount of log data expected to be stored.Type: GrantFiled: August 9, 2022Date of Patent: September 17, 2024Assignee: Dell Products L.P.Inventors: Xiao Liu, Yingyan Zheng, Junyi Zhang, Yourong Alan Wang, Xiaowei Luo, Heng Liu, Chunjuan Zhou, Xiaoqin Liu
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Publication number: 20240289262Abstract: Devices, systems, methods, and techniques are disclosed herein for automatic testing with feature tags trained by machine learning for updates in version control systems. An example method includes deploying multiple updates in a code repository of a version control system and mapping the multiple updates using multiple feature labels. The multiple feature labels have been trained in a machine learning model to represent corresponding functional features. A processing device then identifies a subset of codes in the code repository. The subset of codes in the code repository is functionally affected by the multiple updates and is identified based on the multiple feature labels. The processing device performs a verification job on each of the subset of codes in the code repository in preparation for committing the multiple updates in the code repository.Type: ApplicationFiled: February 28, 2023Publication date: August 29, 2024Inventors: Qianqian Zhu, Leigh Griffin, Benat Garcia, Junyi Zhang, Xu Han
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Publication number: 20240201881Abstract: An input/output (I/O) request processing method includes: receiving a target I/O request, where the target I/O request carries a destination address and a target logical block address, and the destination address is a node address of a first storage node; determining, based on a preset correspondence between a logical block address and a storage node, a second storage node corresponding to the target logical block address; if the second storage node is inconsistent with the first storage node, modifying the destination address in the target I/O request to a node address of the second storage node, to obtain a target I/O request having a modified destination address; and sending the target I/O request having the modified destination address.Type: ApplicationFiled: February 28, 2024Publication date: June 20, 2024Inventors: Shuo Liu, Junyi Zhang, Qiaoling Wang, Peng Zhang
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Patent number: 11963346Abstract: The present application provides a semiconductor structure and a preparation method thereof, including: a substrate; a trench; a bit line contact structure; a bit line structure; a bit line protection structure, the bit line protection structure including a top dielectric layer and a sidewall structure, the top dielectric layer is located on the bit line structure and forms a laminated structure together with the bit line structure; the sidewall structure covers part of sidewalls of the laminated structure on the substrate, the sidewall structure has a first air gap; an isolation pattern structure, the isolation pattern structure has a second air gap, the isolation pattern structure extends along a second direction, the second direction intersects with the first direction, to form capacitance contact hole between the adjacent bit line protection structures and the adjacent isolation pattern structures.Type: GrantFiled: January 13, 2022Date of Patent: April 16, 2024Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventors: Yexiao Yu, Junyi Zhang
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Publication number: 20240107313Abstract: A control frame processing method receives a control frame transmitted by the access point, and parses the received control frame to extract a random value and a MIC check value therein; decrypts the random value and the MIC check value by using a data key from the access point to obtain an original plaintext of the random value and the original plaintext of the MIC check value; calculates a local MIC check value using the MIC key from the access point, the non-check field in the control frame, and the random value; determines whether the original plaintext of the MIC check value is consistent with the local MIC check value, and in response to that the original plaintext of the MIC check value is consistent with the local MIC check value, performs a corresponding control operation according to the control frame.Type: ApplicationFiled: December 31, 2021Publication date: March 28, 2024Inventors: YUANYUAN ZHANG, SHENGDONG GU, JUNYI ZHANG
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Publication number: 20240080779Abstract: Provided is a method sending an acknowledgment frame, wherein by receiving a data frame sent by the first access point and calculating the minimum transmission power of the present station, the maximum transmission power of the station is used as the initial transmission power; the pre-established queue of the maximum transmission powers of the overlapping basic service set is invoked; the queue is a set of maximum transmission powers which does not affect packet reception of one or more second stations and calculated by the first station; the maximum transmission power of the overlapping basic service set allowed in the pre-established queue is traversed sequentially; being greater than or equal to the minimum transmission power, the minimum value among the initial transmission power and one or more maximum transmission powers is taken as the final transmission power; and the acknowledgment frame is sent by using the determined final transmission power.Type: ApplicationFiled: December 31, 2021Publication date: March 7, 2024Inventors: YUANYUAN ZHANG, SHENGDONG GU, JUNYI ZHANG
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Publication number: 20230214377Abstract: Techniques manage log data. Such techniques involve receiving log data describing a state of an application system at a target time point. Such techniques further involve determining whether a level of the log data satisfies a predetermined level. Such techniques further involve, in response to determining that the level of the log data satisfies the predetermined level, storing log data within a predetermined range adjacent to the target time point to a log repository of the application system, the predetermined range indicating the amount of log data expected to be stored.Type: ApplicationFiled: August 9, 2022Publication date: July 6, 2023Inventors: Xiao Liu, Yingyan Zheng, Junyi Zhang, Yourong Alan Wang, Xiaowei Luo, Heng Liu, Chunjuan Zhou, Xiaoqin Liu
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Publication number: 20230154787Abstract: A method for manufacturing a semiconductor structure includes the following operations. A support layer and a first dielectric layer that are stacked are formed on the substrate, in which first trenches are formed in the support layer and the first dielectric layer. A first blocking layer covering sidewalls and bottoms of the first trenches and a top surface of the first dielectric layer is formed. The first blocking layer and the first dielectric layer are etched to form etching holes. The first dielectric layer exposed by the etching holes is removed to form cavities. A second blocking layer is formed, which seals the etching holes at the tops of the cavity. Part of the first blocking layer in the first trenches is removed so that the first trenches expose the substrate. Wires are formed in the first trenches.Type: ApplicationFiled: January 19, 2023Publication date: May 18, 2023Inventors: Songmei Shen, Junyi Zhang
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Publication number: 20230005931Abstract: The disclosure provides a semiconductor structure and a method for manufacturing a semiconductor structure, relates to the field of semiconductor manufacturing technologies. The semiconductor structure includes: a substrate, having a bit line groove; a bit line, located in the bit line groove, and extending in a first direction; and a vertical transistor, located on the bit line. The bit line includes a bit line contact structure, and the bit line contact structure is a concave structure and/or a convex structure. The vertical transistor is electrically connected to the bit line by the bit line contact structure.Type: ApplicationFiled: November 2, 2021Publication date: January 5, 2023Inventors: Junyi ZHANG, Xin LI, Zhan YING
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Publication number: 20220353207Abstract: A communication method and apparatus relating to the field of communication technologies. The method includes a network device receives at least two packets, and aggregates the at least two packets to obtain aggregated packets. Messages to which the at least two packets separately belong have a same message index. The message index is used to index the messages to which the at least two packets separately belong. In the communication method provided in this application, the network device is used to implement aggregation processing, to reduce a communication delay and data redundancy in a communication network.Type: ApplicationFiled: July 15, 2022Publication date: November 3, 2022Inventors: Shuo Liu, Qiaoling Wang, Jianfei He, Junyi Zhang
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Publication number: 20220320112Abstract: The present application provides a semiconductor structure and a preparation method thereof, including: a substrate; a trench; a bit line contact structure; a bit line structure; a bit line protection structure, the bit line protection structure including a top dielectric layer and a sidewall structure, the top dielectric layer is located on the bit line structure and forms a laminated structure together with the bit line structure; the sidewall structure covers part of sidewalls of the laminated structure on the substrate, the sidewall structure has a first air gap; an isolation pattern structure, the isolation pattern structure has a second air gap, the isolation pattern structure extends along a second direction, the second direction intersects with the first direction, to form capacitance contact hole between the adjacent bit line protection structures and the adjacent isolation pattern structures.Type: ApplicationFiled: January 13, 2022Publication date: October 6, 2022Inventors: Yexiao YU, Junyi Zhang
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Publication number: 20220289749Abstract: The present invention provides pharmacological compounds including an effector moiety conjugated to a binding moiety that directs the effector moiety to a biological target of interest. Likewise, the present invention provides compositions, kits, and methods (e.g., therapeutic, diagnostic, and imaging) including the compounds. The compounds can be described as a protein interacting binding moiety-drug conjugate (SDC-TRAP) compounds, which include a protein interacting binding moiety and an effector moiety. For example, in certain embodiments directed to treating cancer, the SDC-TRAP can include an Hsp90 inhibitor conjugated to a cytotoxic agent as the effector moiety.Type: ApplicationFiled: May 26, 2022Publication date: September 15, 2022Inventors: Neera Jain, Weiwen Ying, Dinesh U. Chimmanamada, Junyi Zhang, Amit Kale
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Patent number: 11377447Abstract: The present invention provides pharmacological compounds including an effector moiety conjugated to a binding moiety that directs the effector moiety to a biological target of interest. Likewise, the present invention provides compositions, kits, and methods (e.g., therapeutic, diagnostic, and imaging) including the compounds. The compounds can be described as a protein interacting binding moiety-drug conjugate (SDC-TRAP) compounds, which include a protein interacting binding moiety and an effector moiety. For example, in certain embodiments directed to treating cancer, the SDC-TRAP can include an Hsp90 inhibitor conjugated to a cytotoxic agent as the effector moiety.Type: GrantFiled: June 19, 2018Date of Patent: July 5, 2022Assignee: MADRIGAL PHARMACEUTICALS, INC.Inventors: Neera Jain, Weiwen Ying, Dinesh U. Chimmanamada, Junyi Zhang, Amit Kale
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Patent number: 11279043Abstract: An electronic guide dog includes: a main frame, front drive wheels disposed on both sides of a front portion of the main frame, and rear drive wheels disposed on both sides of a rear portion of the main frame, wherein the front drive wheels and the rear drive wheels are connected to the main frame through front arms and rear arms, respectively; wherein the electronic guide dog further comprises: a head frame hinged to a front of a top end of the main frame, wherein a signal receiving board is provided on the head frame; a drive mechanism comprising a rear drive motor; a swivel obstacle avoidance mechanism comprising an infrared sensor provided on a front side of the main frame, a left front drive motor and a right front drive motor; an identification braking mechanism; a front arm swing mechanism; and an auxiliary support mechanism.Type: GrantFiled: March 4, 2020Date of Patent: March 22, 2022Inventor: Junyi Zhang
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Publication number: 20210085700Abstract: The present invention provides pharmacological compounds including an effector moiety conjugated to a binding moiety that directs the effector moiety to a biological target of interest. Likewise, the present invention provides compositions, kits, and methods (e.g., therapeutic, diagnostic, and imaging) including the compounds. The compounds can be described as a protein interacting binding moiety-drug conjugate (SDC-TRAP) compounds, which include a protein interacting binding moiety and an effector moiety. For example, in certain embodiments directed to treating cancer, the SDC-TRAP can include an Hsp90 inhibitor conjugated to a cytotoxic agent as the effector moiety.Type: ApplicationFiled: September 23, 2020Publication date: March 25, 2021Inventors: Dinesh U. Chimmanamada, Weiwen Ying, Junyi Zhang, Teresa Kowalczyk-Przewloka, Jun Jiang, Sami Osman, Genliang Lu, Dharma Vutukuri, James Loch, Shoujun Chen
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Patent number: 10828315Abstract: The present invention provides pharmacological compounds including an effector moiety conjugated to a binding moiety that directs the effector moiety to a biological target of interest. Likewise, the present invention provides compositions, kits, and methods (e.g., therapeutic, diagnostic, and imaging) including the compounds. The compounds can be described as a protein interacting binding moiety-drug conjugate (SDC-TRAP) compounds, which include a protein interacting binding moiety and an effector moiety. For example, in certain embodiments directed to treating cancer, the SDC-TRAP can include an Hsp90 inhibitor conjugated to a cytotoxic agent as the effector moiety.Type: GrantFiled: March 8, 2016Date of Patent: November 10, 2020Assignee: MADRIGAL PHARMACEUTICALS, INC.Inventors: Dinesh U. Chimmanamada, Weiwen Ying, Junyi Zhang, Teresa Kowalczyk-Przewloka, Jun Jiang, Sami Osman, Genliang Lu, Dharma Vutukuri, James Loch, Shoujun Chen
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Publication number: 20200239472Abstract: The present invention provides pharmacological compounds including an effector moiety conjugated to a binding moiety that directs the effector moiety to a biological target of interest. Likewise, the present invention provides compositions, kits, and methods (e.g., therapeutic, diagnostic, and imaging) including the compounds. The compounds can be described as a protein interacting binding moiety-drug conjugate (SDC-TRAP) compounds, which include a protein interacting binding moiety and an effector moiety. For example, in certain embodiments directed to treating cancer, the SDC-TRAP can include an Hsp90 inhibitor conjugated to a cytotoxic agent as the effector moiety.Type: ApplicationFiled: June 19, 2018Publication date: July 30, 2020Inventors: Neera Jain, Weiwen Ying, Dinesh U. Chimmanamada, Junyi Zhang, Amit Kale
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Publication number: 20200215697Abstract: An electronic guide dog includes: a main frame, front drive wheels disposed on both sides of a front portion of the main frame, and rear drive wheels disposed on both sides of a rear portion of the main frame, wherein the front drive wheels and the rear drive wheels are connected to the main frame through front arms and rear arms, respectively; wherein the electronic guide dog further comprises: a head frame hinged to a front of a top end of the main frame, wherein a signal receiving board is provided on the head frame; a drive mechanism comprising a rear drive motor; a swivel obstacle avoidance mechanism comprising an infrared sensor provided on a front side of the main frame, a left front drive motor and a right front drive motor; an identification braking mechanism; a front arm swing mechanism; and an auxiliary support mechanism.Type: ApplicationFiled: March 4, 2020Publication date: July 9, 2020Inventor: Junyi Zhang
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Publication number: 20190060473Abstract: The present invention provides Hsp90 drug conjugates (HDCs) comprising an Hsp90 ligand or prodrug thereof, a linker moiety and a payload moiety. The invention also provides methods for treating a disease or disorder in a subject, for example cancer, with an HDC.Type: ApplicationFiled: February 24, 2017Publication date: February 28, 2019Inventors: Dinesh U. Chimmanamada, Elena Kostik, Dharma Vutukuri, Weiwen Ying, Junyi Zhang