Abstract: Circuitry for monitoring the function of electric load, an output stage and a control circuit for driving the output stage and the lines that connect these elements. The circuitry includes at least one fault acquisition logic that is connected in parallel with the output stage. The fault acquisition logic has a terminal that connects to an input of the output stage and another terminal that connects to the output of the output stage. The fault acquisition logic also is connected to a reference potential. The fault acquisition logic has a comparator for comparing potentials for determining fault conditions. Detected fault conditions may be stored in a buffer memory that connects to a main memory. The buffer memory may also have a time delay associated with it. The circuitry also may include a coder for encoding signals indicative of the fault conditions that are detected by the fault acquisition logic. The circuitry may further include a safety disconnect to protect the output stage against overload.