Patents by Inventor Jurgen Jernej

Jurgen Jernej has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory arrangement
    Patent number: 7768862
    Abstract: A memory arrangement including a memory array, which has at least one memory block with a power supply device which can be activated, an address decoder, which is coupled to the at least one memory block in order to control access to the at least one memory block, and an activation device for selectively activating the power supply device of memory blocks. The address decoder is set up to interact with the activation device in such a manner that, when a memory block is accessed for the first time, the power supply device of the memory block is activated and remains activated after the access operation has ended.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: August 3, 2010
    Assignee: Infineon Technologies AG
    Inventors: Dietmar Scheiblhofer, Jurgen Jernej
  • Memory arrangement
    Publication number: 20060067153
    Abstract: A memory arrangement including a memory array, which has at least one memory block with a power supply device which can be activated, an address decoder, which is coupled to the at least one memory block in order to control access to the at least one memory block, and an activation device for selectively activating the power supply device of memory blocks. The address decoder is set up to interact with the activation device in such a manner that, when a memory block is accessed for the first time, the power supply device of the memory block is activated and remains activated after the access operation has ended.
    Type: Application
    Filed: September 30, 2005
    Publication date: March 30, 2006
    Applicant: Infineon Technologies AG
    Inventors: Dietmar Scheiblhofer, Jurgen Jernej