Patents by Inventor Juri Heinrich Krieger

Juri Heinrich Krieger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7864558
    Abstract: The method of nondestructive data reading from the ferroelectric memory cell supplied with the electrodes was developed. This method implies supply of reading electric voltage to the memory element electrodes with the view of generation of resilience in the ferroelectric memory cell and registration of the resilience by the field transistor with the floating gate and/or by the conductive channel made from the material with the piezoelectric properties, and according to the value of the current running through the transistor degree and character of ferroelectric cell polarization are identified. Ferroelectric memory element contains field transistor with extra piezoelement, being the memory cell. Floating gate is based on the piezoelectric material. The memory“ ”cell has three layer structure consisting of two electrodes, with the piezoelectric made from the ferroelectric material placed between the electrodes over the floating gate and transistor.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: January 4, 2011
    Inventor: Juri Heinrich Krieger
  • Publication number: 20090040808
    Abstract: The method of nondestructive data reading from the ferroelectric memory cell supplied with the electrodes was developed. This method implies supply of reading electric voltage to the memory element electrodes with the view of generation of resilience in the ferroelectric memory cell and registration of the resilience by the field transistor with the floating gate and/or by the conductive channel made from the material with the piezoelectric properties, and according to the value of the current running through the transistor degree and character of ferroelectric cell polarization are identified. Ferroelectric memory element contains field transistor with extra piezoelement, being the memory cell. Floating gate is based on the piezoelectric material. The memory cell has three layer structure consisting of two electrodes, with the piezoelectric made from the ferroelectric material placed between the electrodes over the floating gate and transistor.
    Type: Application
    Filed: September 25, 2008
    Publication date: February 12, 2009
    Inventor: Juri Heinrich Krieger
  • Patent number: 7254053
    Abstract: Systems and methodologies for programming a memory cell having a functional or selective conductive layer are provided. The functional zone can include active, and/or passive and/or barrier layers. The system includes a controller that can actively trace conditions associated with such programming. In one aspect of the present invention, by providing an external stimulus, an associated electrical or optical property associated with the memory cell is affected. Such property is then compared to a predetermined value to set/verify a programming state for the memory cell. The external stimulus can then be removed upon completion of the programming, or reduced to a verifying state to read information. The memory cell can include alternating layers of active, passive, diode, and barrier layers positioned between at least two electrodes.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: August 7, 2007
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Juri Heinrich Krieger, Nikolay Fedorovich Yudanov
  • Patent number: 7026702
    Abstract: Systems and methodologies for fabrication of a memory cell or array are disclosed. The memory cell employs a functional zone with passive and active layers. Such passive and active layers facilitate electron migration, and allow a plurality of states for the memory cell. A memory device formed in accordance with the disclosed methodology can include a top-electrode formed over the functional layer, which in turn over lays a lower conductive layer.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: April 11, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Juri Heinrich Krieger, Nikolay Fedorovich Yudanov
  • Patent number: 6992323
    Abstract: Disclosed are memory devices with high data reading and writing speed along with capabilities for long term storage and high information density. The memory devices allow storage of several bits of data, have fast resistance switching and require low operating voltage but at the same time allow to combine its manufacturing technology with the modern semiconductor manufacturing technology. An exemplary implementation option of the memory cell contains two continuous electrodes between which there is a multilayer functional zone consisting of one active layer, one barrier layer and one passive layer.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: January 31, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Juri Heinrich Krieger, Nikolay Fedorovich Yudanov
  • Publication number: 20040246768
    Abstract: The invention is in the field of Computer Engineering and can be used in memory devices for various computers, specifically in developing a universal memory system with high data reading and writing speed along with capabilities for long term storage and high information density, as well as in developing video and audio equipment of a new generation, in developing associative memory systems, and in creating synapses (electric circuit elements with programmable electric resistance) for neuronal nets. The lack of such an element holds back the development of true neuronal computers.
    Type: Application
    Filed: February 11, 2004
    Publication date: December 9, 2004
    Inventors: Juri Heinrich Krieger, Nikolav Fedorovich Yudanov
  • Publication number: 20040160801
    Abstract: Systems and methodologies for programming a memory cell having a functional or selective conductive layer are provided. The functional zone can include active, and/or passive and/or barrier layers. The system includes a controller that can actively trace conditions associated with such programming. In one aspect of the present invention, by providing an external stimulus, an associated electrical or optical property associated with the memory cell is affected. Such property is then compared to a predetermined value to set/verify a programming state for the memory cell. The external stimulus can then be removed upon completion of the programming, or reduced to a verifying state to read information.
    Type: Application
    Filed: February 11, 2004
    Publication date: August 19, 2004
    Inventors: Juri Heinrich Krieger, Nikolay Fedorovich Yudanov
  • Publication number: 20040159835
    Abstract: Systems and methodologies for fabrication of a memory cell or array are disclosed. The memory cell employs a functional zone with passive and active layers. Such passive and active layers facilitate electron migration, and allow a plurality of states for the memory cell. A memory device formed in accordance with the disclosed methodology can include a top-electrode formed over the functional layer, which in turn over lays a lower conductive layer.
    Type: Application
    Filed: February 11, 2004
    Publication date: August 19, 2004
    Inventors: Juri Heinrich Krieger, Nikolay Fedorovich Yudanov