Abstract: A method and apparatus for sampling an analog input signal and storing digital values in a memory, wherein a sequence of clock pulses is generated at a predetermined frequency and a pseudo-random integer is generated at every sampling pulse. The sequence of clock pulses is divided by the integer to select one last pulse from every series of clock pulses. A sequence of sampling pulses is formed by generating a second pseudo-random integer and delaying the selected clock pulse. An analog input signal at the delayed clock pulse is sampled and converted to a predetermined digital format. The current signal sample value is stored in a memory.

Abstract: A method and apparatus for alias suppressed digitizing of high frequency analog signals, comprising sampling of the analog signals at mean frequencies considerably lower than the upper frequencies in spectra of said signals, is disclosed. A clock produces a sequence of electrical pulses at a predetermined frequency Fclk. This sequence is divided by a pseudo-random integer A to select one pulse from every series of A clock pulses. A digitally controllable delay block delays the selected pulse by a pseudo-random value D×B, where D is a constant increment of the delay and B is a pseudo-random integer. An analog-to-digital (A/D) converter samples the input signal at the time instant of the said delayed pulse. A memory receives and stores the digital sample value from the output of the A/D convener. Said integers A and B are changed after every sampling event.