Patents by Inventor Juro Yasui

Juro Yasui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5739544
    Abstract: By etching, a first groove and a second groove are formed in a silicon substrate. Surfaces of the side walls of these grooves have a surface orientation of (111). The first and second grooves sandwich a silicon thin plate therebetween, which is formed as a part of the silicon substrate. The silicon thin plate is sufficiently thin so as to act as a quantum well. Further, a pair of silicon oxide films acting as tunneling barriers are formed on the surfaces of the side walls of the silicon thin plate, thus forming a double barrier structure. In addition, a pair of polysilicon electrodes are formed and sandwich the double barrier structure. As a result, the structure of a resonance tunneling diode, which utilizes the resonance tunneling effect, is provided. Adding a third electrode to the above structure provides a resonance tunneling transistor.
    Type: Grant
    Filed: December 12, 1995
    Date of Patent: April 14, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichiro Yuki, Yoshihiko Hirai, Kiyoshi Morimoto, Masaaki Niwa, Juro Yasui, Kenji Okada, Masaharu Udagawa, Kiyoyuki Morita
  • Patent number: 5562802
    Abstract: A quantum device including a plate-like conductor part having a necking portion and a method of producing the same are disclosed.
    Type: Grant
    Filed: April 10, 1995
    Date of Patent: October 8, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenji Okada, Kiyoshi Morimoto, Masaharu Udagawa, Koichiro Yuki, Masaaki Niwa, Yoshihiko Hirai, Juro Yasui
  • Patent number: 5543351
    Abstract: A silicon substrate comprises at least two surfaces extending substantially along respective crystal faces of (111) crystal orientation of the silicon, the crystal faces of (111) crystal orientation crossing with each other, an electrically insulating layer formed by oxidizing the silicon substrate from the surfaces, and an electrically conductive portion insulated electrically by the electrically insulating layer from an outside of the silicon substrate.
    Type: Grant
    Filed: October 31, 1994
    Date of Patent: August 6, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihiko Hirai, Kiyoshi Morimoto, Yasuaki Terui, Masaaki Niwa, Juro Yasui, Kenji Okada, Masaharu Udagawa, Koichiro Yuki
  • Patent number: 5514614
    Abstract: By etching, a first groove and a second groove are formed in a silicon substrate. Surfaces of the side walls of these grooves have a surface orientation of (111). The first and second grooves sandwich a silicon thin plate therebetween, which is formed as a part of the silicon substrate. The silicon thin plate is sufficiently thin so as to act as a quantum well. Further, a pair of silicon oxide films acting as tunneling barriers are formed on the surfaces of the side walls of the silicon thin plate, thus forming a double barrier structure. In addition, a pair of polysilicon electrodes are formed and sandwich the double barrier structure. As a result, the structure of a resonance tunneling diode, which utilizes the resonance tunneling effect, is provided. Adding a third electrode to the above structure provides a hot electron transistor.
    Type: Grant
    Filed: April 13, 1995
    Date of Patent: May 7, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichiro Yuki, Yoshihiko Hirai, Koyoshi Morimoto, Masaaki Niwa, Juro Yasui, Kenji Okada, Masaharu Udagawa
  • Patent number: 5486706
    Abstract: By etching, a first groove and a second groove are formed in a silicon substrate. Surfaces of the side walls of these grooves have a surface orientation of (111). The first and second grooves sandwich a silicon thin plate therebetween, which is formed as a part of the silicon substrate. The silicon thin plate is sufficiently thin so as to act as a quantum well. Further, a pair of silicon oxide films acting as tunneling barriers are formed on the surfaces of the side walls of the silicon thin plate, thus forming a double barrier structure. In addition, a pair of polysilicon electrodes are formed and sandwich the double barrier structure. As a result, the structure of a resonance tunneling diode, which utilizes the resonance tunneling effect, is provided. Adding a third electrode to the above structure provides a hot electron transistor.
    Type: Grant
    Filed: May 26, 1994
    Date of Patent: January 23, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichiro Yuki, Yoshihiko Hirai, Kiyoshi Morimoto, Masaaki Niwa, Juro Yasui, Kenji Okada, Masaharu Udagawa
  • Patent number: 5480492
    Abstract: For removing an unnecessary substance on a silicon substrate surface, a temperature of the unnecessary substance on the silicon substrate surface is not less than 750.degree. C. when the unnecessary substance is exposed to a gas including ozone.
    Type: Grant
    Filed: October 15, 1993
    Date of Patent: January 2, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaharu Udagawa, Juro Yasui, Masaaki Niwa, Yoshihiko Hirai, Kenji Okada, Kiyoshi Morimoto, Koichiro Yuki
  • Patent number: 5444267
    Abstract: A quantum device including a plate-like conductor part having a necking portion made by forming a first mask layer having a first strip portion on a conductor substrate; forming a second mask layer having a second strip portion on the conductor substrate; etching a region of the conductor substrate which is not covered with the first and second mask layers, by using the first and second mask layers as an etching mask, to form a plurality of first recess portions on a surface of the conductor substrate; selectively covering side faces of the plurality of first recess portions, and side faces of the first and second mask layers with a side wall film; selectively removing only the second mask layer; etching another region of the conductor substrate which is not covered with the first mask layer and the side wall film, by using the first mask layer and the side wall film as an etching mask, to form a plurality of second recess portions on the surface of the conductor substrate; selectively removing part of anothe
    Type: Grant
    Filed: October 28, 1994
    Date of Patent: August 22, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenji Okada, Kiyoshi Morimoto, Masaharu Udagawa, Koichiro Yuki, Masaaki Niwa, Yoshihiko Hirai, Juro Yasui
  • Patent number: 5405454
    Abstract: A silicon substrate comprises, at least two surfaces extending substantially along respective crystal faces of (111) crystal orientation of the silicon, the crystal faces of (111) crystal orientation crossing with each other, an electrically insulating layer formed by oxidizing the silicon substrate from the surfaces, and an electrically conductive portion insulated electrically by the electrically insulating layer from an outside of the silicon substrate.
    Type: Grant
    Filed: March 12, 1993
    Date of Patent: April 11, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihiko Hirai, Kiyoshi Morimoto, Yasuaki Terui, Masaaki Niwa, Juro Yasui, Kenji Okada, Masaharu Udagawa, Koichiro Yuki
  • Patent number: 5355219
    Abstract: Two diffraction gratings having the same grate pitch are respectively attached to a semiconductor wafer and a mask to be used in lithography in production of a semiconductor, such that the diffraction gratings are parallel to each other. When first and second frequency lights respectively having different frequencies, are incident, through a light path adjusting system, upon the mask- and wafer-side diffraction gratings in the directions of the first order diffraction angles symmetric with respect to normal-line directions of the diffraction gratings, the frequency lights first orderly diffracted by the diffraction gratings, interfere with each other, thus forming mask- and wafer-side interference lights. An initial phase difference .DELTA..phi.0 between the interference lights, is detected. Then, the light path adjusting system is adjusted to shift the interference lights by the same angle .theta.1 in the same direction, and a later phase difference .DELTA..phi.
    Type: Grant
    Filed: December 17, 1993
    Date of Patent: October 11, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kiyoshi Araki, Juro Yasui
  • Patent number: 5347140
    Abstract: A resonant electron transfer device includes a plurality of units each of which has of at least one one-dimensional quantum wire having a quantum well elongated in a direction, a zero-dimensional quantum dot having a base quantization level higher than that of the one-dimensional quantum wire an electrode for controlling respective internal levels of the quantum wire and dot wherein the quantum wire and dot forming one unit is connected via a potential barrier capable of exhibiting a tunnel effect therebetween.
    Type: Grant
    Filed: August 27, 1992
    Date of Patent: September 13, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihiko Hirai, Kiyoshi Morimoto, Yasuaki Terui, Atsuo Wada, Kenji Okada, Juro Yasui, Masaaki Niwa
  • Patent number: 5334466
    Abstract: An X-ray transmission film 2 of a SiN film is formed on the surface of a mask base 1. Formed on the surface of the X-ray transmission film 2 are an LSI pattern 3, and an alignment mark 4 composed of a convex portion 4a and a concave portion 4b. On the surface of the convex portion 4a is an alignment light reflection grating pattern 5 of a tungsten film. Formed on the surface of the concave portion 4b is a metal film 7 of a tungsten film.With this arrangement, a laser light beam 13 does not reach a semiconductor substrate 30 through the alignment mark 4. Thus, when detecting a first-order reflection diffracted light beam 14 from the alignment mark 4 by means of a photodetector, there is no inclusion of unwanted reflected light beams from the semiconductor substrate 30.
    Type: Grant
    Filed: October 20, 1992
    Date of Patent: August 2, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Juro Yasui, Kiyoshi Araki
  • Patent number: 5296719
    Abstract: A quantum wire is formed at the top of triangular protrusion of silicon substrate. A quantum wire is isolated from the substrate by silicon oxide layers. A quantum wire is isolated from the substrate by impurity layers of a conduction type different from that of the substrate. An insulator film and a gate electrode are formed at the edge of triangular protrusion of a silicon substrate, and a quantum wire is induced by applying a voltage to the gate electrode. A quantum wire structure is fabricated by forming saw-tooth-like protrusions having (111) side planes by performing anisotropic crystalline etching and by oxidizing the silicon substrate with use of the oxide protection film to remain only around the top of the protrusions unoxidized. In another method, an oxide film is formed except around the top of the protrusions whereby a quantum wire is formed at the unoxidized region. In a different method, impurity layers are formed except around the top of the protrusions by ion implantation.
    Type: Grant
    Filed: July 20, 1992
    Date of Patent: March 22, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihiko Hirai, Juro Yasui, Yasuaki Terui, Kiyoshi Morimoto, Atsuo Wada, Kenji Okada, Shin Hashimoto, Shinji Odanaka, Masaaki Niwa, Kaoru Inoue
  • Patent number: 5244828
    Abstract: The method of fabricating a quantum device of the invention includes the steps of: forming a quantum dot having side faces on a first insulating layer; forming a second insulating layer which can function as a tunnel film, on at least the side faces of the quantum dot; depositing a non-crystal semiconductor layer on the first insulating layer so as to cover the quantum dot; removing at least a portion of the non-crystal semiconductor layer which is positioned above the quantum dot; single-crystallizing a predetermined portion of the non-crystal semiconductor layer which is in contact with the second insulating layer; and forming a quantum wire which includes the single-crystallized semiconductor portion and the quantum dot, on the first insulating layer.
    Type: Grant
    Filed: August 25, 1992
    Date of Patent: September 14, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenji Okada, Yasuaki Terui, Juro Yasui, Yoshihiko Hirai, Masaaki Niwa, Atsuo Wada, Kiyoshi Morimoto
  • Patent number: 5227268
    Abstract: An object of the sub- invention is to offer a X-ray mask capable of providing sufficiently strong alignment signal and to improve alignment accuracy. The X ray mask of the subject invention becomes the circuitry pattern and the alignment pattern on one main surface of the X-ray permeable film. Since the structure is also provided with a X-ray absorbant pattern, and this structure enables the laser beam without attenuation to illuminate the alignment pattern formed on the other surface of the X-ray permeable film, and by further optimizing the height of the alignment marks, a sufficiently strong alignment signal is obtained.
    Type: Grant
    Filed: October 11, 1991
    Date of Patent: July 13, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Keisuke Koga, Juro Yasui