Abstract: A system (1) for beamforming of incoming radio-frequency signals is provided. The system includes at least one digital signal processor, DSP, a plurality of analogue-to-digital converters, ADC, each connected to the at least one DSP. Further, the system comprises a plurality of sample-and-hold, S&H, circuit groups, each comprising a plurality of sample-and-hold circuits additively connected to a respective ADC and a plurality of receiving antenna connections each connected to a respective S&H circuit in each group at one end and each antenna connection connected to a respective antenna. The system is configured to selectively alternate between a plurality of beamforming functionalities, wherein the receiver system is arranged to time-interleave the ADCs and control specific S&H circuits in each S&H group by at least one of time-interleave or disable specific S&H circuits depending on a set beamforming functionality. An associated method (100) is also provided.

Abstract: The proposed disclosure relates to a method (100) and system (1) arranged to provide beamforming of incoming radio-frequency signals, the receiver system (1) comprising at least one digital signal processor, DSP (2), a plurality of analogue-to-digital converters, ADC (3), each connected to the at least one DSP (2). Further the system comprises a plurality of sample-and-hold, S&H, circuit groups (4), each comprising a plurality of sample-and-hold circuits (5) additively connected to a respective ADC (3) and a plurality of receiving antenna connections (6) each connected to a respective S&H circuit (5) in each group (4) at one end and each antenna connection (6) connected to a respective antenna (7).

Abstract: According to an aspect, there is provided a method for power-amplification of a transmission signal, comprising: obtaining the transmission signal with phase and amplitude modulation; generating a power-amplified polar signal for approximating a power-amplified transmission signal by power-amplifying a first constant-envelope signal with one of two or more first amplification factors based on the transmission signal; generating an outphasing pair of a first power-amplified outphasing signal and a second power-amplified outphasing signal based on the transmission signal; and combining the power-amplified polar signal, the first power-amplified outphasing signal and the second power-amplified outphasing signal to provide the power-amplified transmission signal.

Abstract: According to an aspect, there is provided a method for power-amplification of a transmission signal, comprising: obtaining the transmission signal with phase and amplitude modulation; generating a power-amplified polar signal for approximating a power-amplified transmission signal by power-amplifying a first constant-envelope signal with one of two or more first amplification factors based on the transmission signal; generating an outphasing) pair of a first power-amplified outphasing signal and a second power-amplified outphasing signal based on the transmission signal; and combining the power-amplified polar signal, the first power-amplified outphasing signal and the second power-amplified outphasing signal to provide the power-amplified transmission signal.

Abstract: A digitally controlled delay device includes at least one delay generating gate device, whose propagation delay is controlled by limiting operating current by means of a tail transistor that is controlled by its gate voltage, a gate control voltage control means for controlling the current limiting transistor gate voltage, and a bank of digitally controlled MOSFET transistors in parallel configuration, and the digital control is adapted to switch the transistors to off and to diode mode connection, current feeding means to feed current through the bank of MOSFET transistors, and the voltage over the bank of parallel transistors is used for gate source control voltage of the tail transistors.

Abstract: An amplifier circuitry having adjustable parameters is presented. The present amplifier circuitry includes a feed-back loop, wherein the feedback loop converts (26) a signal to another frequency, filters (20) the signal in the other frequency, and restores (24) the filtered signal back to the original frequency for inputting the signal to an input of the amplifier (22). The feed-back loop implements a band-stop filter (20) having an adjustable stopband causing the amplifier circuitry to have an adjustable band-pass response. A passband of the amplifier circuitry is changed from one operating frequency to another operating frequency by changing frequency conversion parameters of the feedback loop.

Abstract: A digitally controlled delay device includes at least one delay generating gate device, whose propagation delay is controlled by limiting operating current by means of a tail transistor that is controlled by its gate voltage, a gate control voltage control means for controlling the current limiting transistor gate voltage, and a bank of digitally controlled MOSFET transistors in parallel configuration, and the digital control is adapted to switch the transistors to off and to diode mode connection, current feeding means to feed current through the bank of MOSFET transistors, and the voltage over the bank of parallel transistors is used for gate source control voltage of the tail transistors.

Abstract: An amplifier circuitry having adjustable parameters is presented. The present amplifier circuitry includes a feed-back loop, wherein the feedback loop converts (26) a signal to another frequency, filters (20) the signal in the other frequency, and restores (24) the filtered signal back to the original frequency for inputting the signal to an input of the amplifier (22). The feed-back loop implements a band-stop filter (20) having an adjustable stopband causing the amplifier circuitry to have an adjustable band-pass response. A passband of the amplifier circuitry is changed from one operating frequency to another operating frequency by changing frequency conversion parameters of the feedback loop.

Abstract: An amplification apparatus comprising first amplification circuitry having first shunt-peak circuitry and second amplification circuitry having second shunt-peak circuitry, wherein the amplification apparatus is arranged to provide an operational bandwidth over which the first and second amplification circuitry amplify signals, and wherein the second shunt-peak circuitry is arranged to use at least part of the first shunt-peak circuitry.

Abstract: Described is an apparatus that includes a frequency source and a plurality of time domain direct digital synthesizers each having an input connected to an output of the frequency source and an output providing an output frequency signal. A particular time domain direct digital synthesizer includes a sigma-delta modulator that functions as a second order multi-stage noise shaping sigma-delta modulator. In one exemplary embodiment sigma-delta modulator outputs provide a unitary-weighted word used to switch certain unit capacitors that comprise part of a delay modulator to produce a time-varying delay having a time-averaged value that directly corresponds to a binary value appearing on a plurality of phase accumulator outputs.

Abstract: Disclosed is a multi-mode radio frequency amplifier. The amplifier includes a plurality of input transistors, a plurality of output branches, and a switching stage interposed between the plurality of input transistors and the plurality of output branches for selectively connecting the plurality of input transistors to the plurality of output branches. Individual ones of operational modes of the multi-mode amplifier correspond to an individual one of the plurality of frequency selective loads. A particular one of the plurality of frequency selective loads is one of operating or non-operating during operation of the multi-mode amplifier. A gain of the multi-mode amplifier is reduced by controlling the plurality of elements to steer a predetermined portion of a total signal current that is output from one of the input transistors, from an associated operating frequency selective load to a non-operating frequency selective load.

Abstract: Described is an apparatus that includes a frequency source and a plurality of time domain direct digital synthesizers each having an input connected to an output of the frequency source and an output providing an output frequency signal. A particular time domain direct digital synthesizer includes a sigma-delta modulator that functions as a second order multi-stage noise shaping sigma-delta modulator. In one exemplary embodiment sigma-delta modulator outputs provide a unitary-weighted word used to switch certain unit capacitors that comprise part of a delay modulator to produce a time-varying delay having a time-averaged value that directly corresponds to a binary value appearing on a plurality of phase accumulator outputs.

Abstract: An amplification apparatus comprising first amplification circuitry having first shunt-peak circuitry and second amplification circuitry having second shunt-peak circuitry, wherein the amplification apparatus is arranged to provide an operational bandwidth over which the first and second amplification circuitry amplify signals, and wherein the second shunt-peak circuitry is arranged to use at least part of the first shunt-peak circuitry.

Abstract: To find frequency slots over which a cognitive radio can send an opportunistic transmission, a wideband spectrum is searched with a lower resolution to identify bandwidth slices having low or no signal levels. The identified bandwidth slices are searched with a higher resolution candidate frequency slices are selected as those bandwidth slices having least signal levels after the higher resolution searching, and ranked from lowest signal level to highest. A spectrum detection algorithm is executed on the selected candidate frequency slices in the order of the rank until it is decided that one of them has sufficiently free spectrum. A transmission is then opportunistically sent on the decided candidate frequency slice. Ongoing to the searching, intermittent signals are detected and a band about them is searched with the lower resolution to determine if the band about the detected intermittent signal is an identified bandwidth slice. Various techniques are shown for how the fine search is conducted.

Abstract: An inductively degenerated low noise amplifier arrangement is shown having a transistor and a bonding pad connected to the input terminal of the transistor, wherein the bonding pad has parasitic capacitance, and wherein the bonding pad includes a metal layer connected to a second terminal of the transistor. In case of a field-effect transistor the second terminal may be the source and in case of a bipolar transistor the second terminal may be the emitter. The metal layer may be the ground plane of the bonding pad or an additional, intermediate layer.

Abstract: An inductively degenerated low noise amplifier arrangement is shown having a transistor and a bonding pad connected to the input terminal of the transistor, wherein the bonding pad has parasitic capacitance, and wherein the bonding pad includes a metal layer connected to a second terminal of the transistor. In case of a field-effect transistor the second terminal may be the source and in case of a bipolar transistor the second terminal may be the emitter. The metal layer may be the ground plane of the bonding pad or an additional, intermediate layer.

Abstract: The present invention relates to a method and circuit arrangement for adjusting a gain, wherein said circuit arrangement comprises at least a first output branch connected to a first load and a second output branch connected to a second load. The gain control function is realized based on a current splitting, wherein a non-operated output branch is used as a kind of dummy branch for receiving a part of the output current. Thus, only as many output branches as there are outputs are required to implement a gain control based on splitting. Thereby, a complexity of the layout design is reduced and control and biasing of dummy branches is not required.

Abstract: The present invention relates to a method and circuit arrangement for adjusting a gain, wherein said circuit arrangement comprises at least a first output branch connected to a first load and a second output branch connected to a second load. The gain control function is realized based on a current splitting, wherein a non-operated output branch is used as a kind of dummy branch for receiving a part of the output current. Thus, only as many output branches as there are outputs are required to implement a gain control based on splitting. Thereby, a complexity of the layout design is reduced and control and biasing of dummy branches is not required.

Abstract: The present invention relates to a method and circuit arrangement for adjusting a gain, wherein said circuit arrangement comprises at least a first output branch connected to a first load and a second output branch connected to a second load. The gain control function is realized based on a current splitting, wherein a non-operated output branch is used as a kind of dummy branch for receiving a part of the output current. Thus, only as many output branches as there are outputs are required to implement a gain control based on splitting. Thereby, a complexity of the layout design is reduced and control and biasing of dummy branches is not required.

Abstract: The present invention relates to a method and circuit arrangement for adjusting a gain, wherein said circuit arrangement comprises at least a first output branch connected to a first load and a second output branch connected to a second load. The gain control function is realized based on a current splitting, wherein a non-operated output branch is used as a kind of dummy branch for receiving a part of the output current. Thus, only as many output branches as there are outputs are required to implement a gain control based on splitting. Thereby, a complexity of the layout design is reduced and control and biasing of dummy branches is not required.