Patents by Inventor Justin C. Haggard

Justin C. Haggard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Scriptable hierarchical emulation engine
    Patent number: 9652260
    Abstract: In a data storage system, a hierarchical data structure, such as a file system or a database, is utilized to organize a hierarchical arrangement of device containers corresponding to various device identifiers of the plurality of hardware components in the target hardware system, scripts corresponding to various packet types of communication packets in the target hardware system, and responses corresponding to various packet data in the communication packets in the target hardware system. In response to receipt by a hierarchical emulation engine of a communication packet during emulation of the target hardware system, the communication packet including a device identifier, packet type and packet data, a response to the communication packet is determined by traversing the hierarchical arrangement based on the device identifier, packet type and packet data of the communication packet. The determined response is then provided.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: May 16, 2017
    Assignee: International Business Machines Corporation
    Inventors: Razik S. Ahmed, Shawn P. Authement, Kevin A. Bosien, Adam C. Chunn, Justin C. Haggard, Jake E. Miller, Yves A. Santos
  • SCRIPTABLE HIERARCHICAL EMULATION ENGINE
    Publication number: 20150154038
    Abstract: In a data storage system, a hierarchical data structure, such as a file system or a database, is utilized to organize a hierarchical arrangement of device containers corresponding to various device identifiers of the plurality of hardware components in the target hardware system, scripts corresponding to various packet types of communication packets in the target hardware system, and responses corresponding to various packet data in the communication packets in the target hardware system. In response to receipt by a hierarchical emulation engine of a communication packet during emulation of the target hardware system, the communication packet including a device identifier, packet type and packet data, a response to the communication packet is determined by traversing the hierarchical arrangement based on the device identifier, packet type and packet data of the communication packet. The determined response is then provided.
    Type: Application
    Filed: December 4, 2013
    Publication date: June 4, 2015
    Applicant: International Business Machines Corporation
    Inventors: RAZIK S. AHMED, SHAWN P. AUTHEMENT, KEVIN A. BOSIEN, ADAM C. CHUNN, JUSTIN C. HAGGARD, JAKE E. MILLER, YVES A. SANTOS
  • Method and apparatus for performing enhanced read and write operations in a FLASH memory system
    Patent number: 8775772
    Abstract: Methods and apparatus for enhanced READ and WRITE operations in a FLASH-based solid state storage system that includes a logical to physical translation table where the logical to physical translation table can include entries associating a logical block address with one or more data identifiers, where each data identifier is associated with a data string.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: July 8, 2014
    Assignee: International Business Machines Corporation
    Inventors: James A. Fuxa, Lance W. Shelton, Justin C. Haggard
  • Method and Apparatus for Performing Enhanced Read and Write Operations in a FLASH Memory System
    Publication number: 20110040927
    Abstract: Methods and apparatus for enhanced READ and WRITE operations in a FLASH-based solid state storage system that includes a logical to physical translation table where the logical to physical translation table can include entries associating a logical block address with one or more data identifiers, where each data identifier is associated with a data string.
    Type: Application
    Filed: December 21, 2009
    Publication date: February 17, 2011
    Applicant: TEXAS MEMORY SYSTEMS, INC.
    Inventors: James A. Fuxa, Lance W. Shelton, Justin C. Haggard