Patents by Inventor Justin Chiang

Justin Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9478519
    Abstract: In one general aspect, a method can include forming a redistribution layer on a substrate using a first electroplating process, and forming a conductive pillar on the redistribution layer using a second electroplating process. The method can include coupling a semiconductor die to the redistribution layer, and can include forming a molding layer encapsulating at least a portion of the redistribution layer and at least a portion of the conductive pillar.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: October 25, 2016
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Ahmad R. Ashrafzadeh, Vijay G. Ullal, Justin Chiang, Daniel Kinzer, Michael M. Dube, Oseob Jeon, Chung-Lin Wu, Maria Cristina Estacio
  • Publication number: 20160126219
    Abstract: In one general aspect, a method can include forming a redistribution layer on a substrate using a first electroplating process, and forming a conductive pillar on the redistribution layer using a second electroplating process. The method can include coupling a semiconductor die to the redistribution layer, and can include forming a molding layer encapsulating at least a portion of the redistribution layer and at least a portion of the conductive pillar.
    Type: Application
    Filed: October 30, 2015
    Publication date: May 5, 2016
    Inventors: Ahmad R. ASHRAFZADEH, Vijay G. ULLAL, Justin CHIANG, Daniel KINZER, Michael M. DUBE, Oseob JEON, Chung-Lin WU, Maria Cristina ESTACIO
  • Patent number: 9177925
    Abstract: In one general aspect, a method can include forming a redistribution layer on a substrate using a first electroplating process, and forming a conductive pillar on the redistribution layer using a second electroplating process. The method can include coupling a semiconductor die to the redistribution layer, and can include forming a molding layer encapsulating at least a portion of the redistribution layer and at least a portion of the conductive pillar.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: November 3, 2015
    Assignee: Fairfchild Semiconductor Corporation
    Inventors: Ahmad R. Ashrafzadeh, Vijay G. Ullal, Justin Chiang, Daniel Kinzer, Michael M. Dube, Oseob Jeon, Chung-Lin Wu, Maria Cristina Estacio
  • Publication number: 20140312458
    Abstract: In one general aspect, a method can include forming a redistribution layer on a substrate using a first electroplating process, and forming a conductive pillar on the redistribution layer using a second electroplating process. The method can include coupling a semiconductor die to the redistribution layer, and can include forming a molding layer encapsulating at least a portion of the redistribution layer and at least a portion of the conductive pillar.
    Type: Application
    Filed: November 27, 2013
    Publication date: October 23, 2014
    Applicant: Fairchild Semiconductor Corporation
    Inventors: Ahmad ASHRAFZADEH, Vijay ULLAL, Justin CHIANG, Daniel KINZER, Michael M. DUBE, Oseob JEON, Chung-Lin WU, Maria Cristina ESTACIO
  • Patent number: 7053748
    Abstract: A composite circuit protection device includes a laminar insulating member and first and second laminar circuit protection devices.
    Type: Grant
    Filed: August 7, 2003
    Date of Patent: May 30, 2006
    Assignee: Tyco Electronics Corporation
    Inventors: Justin Chiang, Shou-Mean Fang, William C. Beadling
  • Publication number: 20040027230
    Abstract: A composite circuit protection device includes a laminar insulating member and first and second laminar circuit protection devices.
    Type: Application
    Filed: August 7, 2003
    Publication date: February 12, 2004
    Inventors: Justin Chiang, Shou-Mean Fang, William C. Beadling
  • Patent number: 6606023
    Abstract: A composite circuit protection device includes a laminar insulating member and first and second laminar circuit protection devices.
    Type: Grant
    Filed: April 14, 1998
    Date of Patent: August 12, 2003
    Assignee: Tyco Electronics Corporation
    Inventors: Justin Chiang, Shou-Mean Fang, William C. Beadling
  • Publication number: 20020050914
    Abstract: A composite circuit protection device includes a laminar insulating member and first and second laminar circuit protection devices.
    Type: Application
    Filed: April 14, 1998
    Publication date: May 2, 2002
    Inventors: JUSTIN CHIANG, SHOU-MEAN FANG, WILLIAM C. BEADLING
  • Patent number: 6222716
    Abstract: A method and apparatus for providing a more reliable protection device and an improved PIC power integrated switch. Accordingly, the over-temperature status of the switch as well as the overcurrent status of each of a plurality of ports of the switch are detected. If there is over-temperature, ports with the overcurrent status are identified as a potential cause. These ports are then switched off. After a predetermined waiting time period during which the switch temperature is expected to decrease, the over-temperature status of the switch is again checked. If the over-temperature disappears, then the ports with non-overcurrent status remain on. However, if the over-temperature persists, then all of the ports are turned off. The improved PIC switch thus increases the dynamic operation range of the conventional PIC switch, while ensuring normal operations.
    Type: Grant
    Filed: March 29, 1999
    Date of Patent: April 24, 2001
    Inventors: Justin Chiang, Adrian I. Cogan, Paul Wiener
  • Patent number: 5864458
    Abstract: Electrical circuit protection arrangements with PTC devices and mechanical switches. The combinations of this invention permit the use of mechanical switches and PTC devices to switch voltages and currents in normal circuit operations, wherein the voltage and/or current ratings of the mechanical switches and PTC devices are much less than the normal operating voltages and currents of the circuits. This feature permits the use of smaller and less expensive mechanical switches and PTC device than would otherwise be required in such circuits. The arrangements of switches and PTC devices also permit the PTC devices to limit the magnitude of the fault current passed to the circuit.
    Type: Grant
    Filed: November 29, 1995
    Date of Patent: January 26, 1999
    Assignee: Raychem Corporation
    Inventors: Hugh Duffy, Justin Chiang, John Midgley
  • Patent number: 5745322
    Abstract: An electrical protection system which uses a ground fault interrupter (GFI) to protect a circuit from (A) ground faults and (B) overcurrents and/or overvoltages. For overcurrent protection, a control element may be coupled in series with the line or return input to the GFI, and a bypass element may be coupled in parallel with the control element and the GFI. In case of an overcurrent, the control element causes current to be diverted through the bypass element, thereby creating a current imbalance in the GFI circuitry causing the GFI to open the circuit. For overvoltage protection, a bypass element (e.g. a varistor) may be coupled between, e.g., the line sense input of the GFI and the return sense input of the GFI. In case of an overvoltage, the bypass element conducts current, thereby creating a current imbalance in the GFI circuitry causing the GFI to open the circuit.
    Type: Grant
    Filed: November 28, 1995
    Date of Patent: April 28, 1998
    Assignee: Raychem Corporation
    Inventors: Hugh Duffy, Justin Chiang, John Midgley, Brian Thomas