Patents by Inventor JUSTIN HOGABOAM

JUSTIN HOGABOAM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11954563
    Abstract: Apparatus and method for error reduction in distributed quantum computing via fusing-and-decomposing gates. For example, one embodiment of an apparatus comprises: a quantum module comprising a plurality of qubits; unitary generation logic to combine a group of quantum gates to form at least one unitary operation; decomposition logic to decompose the unitary operation into multiple alternative gate sequences comprising either exact gate sequences or approximate gate sequences; and selection logic to evaluate the multiple alternative gate sequences based on a cost function to identify at least one of the gate sequences.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: April 9, 2024
    Assignee: INTEL CORPORATION
    Inventors: Nicolas Sawaya, Anne Matsuura, Justin Hogaboam
  • Patent number: 11907808
    Abstract: Apparatus and method for measurement-free (MF) quantum error correction (QEC). For example, one embodiment of a method comprises: determining an error syndrome on a first subset of ancilla qubits of a quantum processor; decoding the error syndrome to produce decoded results on a second subset of ancilla qubits of the quantum processor; applying the decoded results to one or more system qubits; and unconditionally resetting the first subset and/or second subset of ancilla qubits to remove entropy and/or noise from the quantum system, wherein the operations of determining the error syndrome, decoding the error syndrome, applying the error syndrome, and unconditionally resetting the first and/or second subset of ancilla qubits are performed responsive to a qubit controller executing quantum control instructions provided from or derived from a script and without transmitting measurement data related to the error syndrome to a non-quantum computing device.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: February 20, 2024
    Assignee: Intel Corporation
    Inventors: Albert Schmitz, Anne Matsuura, Ravi Pillarisetty, Shavindra Premaratne, Justin Hogaboam, Lester Lampert
  • Patent number: 11748649
    Abstract: Apparatus and method for specifying quantum operation parallelism. For example, one embodiment of an apparatus comprises: instruction fetch circuitry to fetch a plurality of quantum instructions from a memory or a cache; slice-based instruction processing circuitry to identify quantum circuit slices comprising sets of one or more of the plurality of quantum instructions; and one or more instruction decoders to decode the quantum instructions to generate quantum microoperations; and quantum execution circuitry to execute sets of the quantum microoperations in parallel based on the quantum circuit slices.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: September 5, 2023
    Assignee: Intel Corporation
    Inventors: Xiang Zou, Justin Hogaboam, Adam Holmes, Sonika Johri
  • Publication number: 20230244459
    Abstract: Apparatus and method for compiling and executing hybrid classical-quantum programs. For example, one embodiment of a method comprises: reading source code specifying both non-quantum operations to be performed by a host processor and quantum operations to be performed by a quantum accelerator; compiling the source code to generate a target object file, wherein portions of the source code specifying the quantum operations are compiled into quantum basic blocks (QBBs) in the target object file, each QBB comprising one or more quantum instructions to be executed by the quantum accelerator and wherein portions of the source code specifying the non-quantum operations are compiled into native instructions to be executed by the host processor.
    Type: Application
    Filed: January 31, 2022
    Publication date: August 3, 2023
    Inventors: XIANG ZOU, JUSTIN HOGABOAM, PRADNYA LAXMAN KHALATE, XIN-CHUAN WU, ANNE MATSUURA, SHAVINDRA PREMARATNE
  • Patent number: 11710058
    Abstract: Apparatus and method for quantum drift compensation. For example, one embodiment of a quantum system comprises: a quantum processor comprising one or more data quantum bits (qubits) and one or more ancilla qubits; a quantum controller to control the qubits responsive to a quantum runtime; an error detector to detect errors in the qubits; a quantum drift compensator to determine a current system drift for the quantum processor based on the errors and to responsively generate a set of compensation values if the current system drift is determined to be above a threshold.
    Type: Grant
    Filed: June 30, 2018
    Date of Patent: July 25, 2023
    Assignee: Intel Corporation
    Inventors: Justin Hogaboam, Adam Holmes
  • Patent number: 11704588
    Abstract: Apparatus and method for injected spin echo sequences in a quantum processor. For example, one embodiment of a processor includes a decoder to decode quantum instructions to generate quantum microoperations (uops) and to decode non-quantum instructions to generate non-quantum uops, execution circuitry to execute the quantum uops and non-quantum uops, and a corrective sequence data structure to identify and/or store corrective sets of uops for one or more of the quantum instructions. The decoder is to query the corrective sequence data structure upon receiving a first quantum instruction to determine if one or more corrective uops exist, and if the one or more corrective uops exist, the decoder is to submit the one or more corrective uops for execution by the execution circuitry.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: July 18, 2023
    Assignee: Intel Corporation
    Inventors: Xiang Zou, Justin Hogaboam
  • Publication number: 20230186139
    Abstract: Apparatus and method for error reduction in distributed quantum computing via fusing-and-decomposing gates. For example, one embodiment of an apparatus comprises: a quantum module comprising a plurality of qubits; unitary generation logic to combine a group of quantum gates to form at least one unitary operation; decomposition logic to decompose the unitary operation into multiple alternative gate sequences comprising either exact gate sequences or approximate gate sequences; and selection logic to evaluate the multiple alternative gate sequences based on a cost function to identify at least one of the gate sequences.
    Type: Application
    Filed: December 9, 2021
    Publication date: June 15, 2023
    Inventors: Nicolas Sawaya, Anne Matsuura, Justin Hogaboam
  • Publication number: 20230129732
    Abstract: Apparatus and method for measurement-free (MF) quantum error correction (QEC). For example, one embodiment of a method comprises: determining an error syndrome on a first subset of ancilla qubits of a quantum processor; decoding the error syndrome to produce decoded results on a second subset of ancilla qubits of the quantum processor; applying the decoded results to one or more system qubits; and unconditionally resetting the first subset and/or second subset of ancilla qubits to remove entropy and/or noise from the quantum system, wherein the operations of determining the error syndrome, decoding the error syndrome, applying the error syndrome, and unconditionally resetting the first and/or second subset of ancilla qubits are performed responsive to a qubit controller executing quantum control instructions provided from or derived from a script and without transmitting measurement data related to the error syndrome to a non-quantum computing device.
    Type: Application
    Filed: September 1, 2021
    Publication date: April 27, 2023
    Inventors: ALBERT SCHMITZ, ANNE MATSUURA, RAVI PILLARISETTY, SHAVINDRA PREMARATNE, JUSTIN HOGABOAM, LESTER LAMPERT
  • Patent number: 11526793
    Abstract: Apparatus and method for a full quantum state simulation. A quantum state simulation system may include a simulation configurator to map quantum register state data of a quantum processor at a first time to a representational data structure and generate a first quantum state image based on the representational data structure. The quantum state simulation system may also include a quantum state simulator to simulate the quantum register state data at a second time using the quantum register state data in the first quantum state image to update a second quantum state image, and store the first and second quantum state images to a data store.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: December 13, 2022
    Assignee: INTEL CORPORATION
    Inventors: Sahar Daraeizadeh, Anne Matsuura, Justin Hogaboam
  • Patent number: 11513552
    Abstract: Apparatus and method for dynamically adjusting a quantum computer clock frequency. For example, one embodiment of an apparatus comprises: a quantum execution unit to execute quantum operations specified by a quantum runtime; a qubit drive controller to translate the quantum operations into physical pulses directed to qubits on a quantum chip at a first cycle frequency; a spin echo sequencer to issue spin echo command sequences to cause the qubit drive controller to generate a sequence of spin echo pulses at the first cycle frequency; and qubit measurement circuitry to measure the qubits and to store qubit timing data for each qubit, the qubit timing data indicating a coherence time or an amount of computational time available for each qubit to perform quantum operations.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: November 29, 2022
    Assignee: Intel Corporation
    Inventors: Justin Hogaboam, Sonika Johri, Anne Matsuura
  • Publication number: 20220343039
    Abstract: Apparatus and method for a full quantum system simulator. For example, one embodiment of a method comprises: initializing a quantum computing system simulator for simulating multiple layers of a quantum system including one or more non-quantum layers and one or more physical quantum device layers of the quantum system; simulating a first set of operations of the one or more non-quantum layers of the quantum system to generate first simulation results; simulating a second set of operations of the one or more quantum device layers of the quantum system to generate second simulation results; analyzing the first and second simulation results to provide at least one configuration recommendation for the quantum system.
    Type: Application
    Filed: April 18, 2022
    Publication date: October 27, 2022
    Applicant: Intel Corporation
    Inventors: ANNE MATSUURA, SONIKA JOHRI, JUSTIN HOGABOAM
  • Publication number: 20220278696
    Abstract: Apparatus and method for neural network learning to detect and correct quantum errors. For example, one embodiment of an apparatus comprises. For example, one embodiment of an apparatus comprises: a quantum processor comprising one or more data quantum bits (qbits) and one or more ancilla qbits; an error decoder to decode a state of at least one of the ancilla qbits to generate an error syndrome related to one or more qbit errors; a neural network to evaluate the error syndrome and to either identify a known corrective response for correcting the error or to perform unsupervised learning to identify a corrective response to the error syndrome.
    Type: Application
    Filed: May 20, 2022
    Publication date: September 1, 2022
    Inventors: JUSTIN HOGABOAM, NARAYAN SRINIVASA
  • Patent number: 11374594
    Abstract: Apparatus and method for neural network learning to detect and correct quantum errors. For example, one embodiment of an apparatus comprises. For example, one embodiment of an apparatus comprises: a quantum processor comprising one or more data quantum bits (qbits) and one or more ancilla qbits; an error decoder to decode a state of at least one of the ancilla qbits to generate an error syndrome related to one or more qbit errors; a neural network to evaluate the error syndrome and to either identify a known corrective response for correcting the error or to perform unsupervised learning to identify a corrective response to the error syndrome.
    Type: Grant
    Filed: May 5, 2018
    Date of Patent: June 28, 2022
    Assignee: INTEL CORPORATION
    Inventors: Justin Hogaboam, Narayan Srinivasa
  • Patent number: 11308248
    Abstract: Apparatus and method for a full quantum system simulator. For example, one embodiment of a method comprises: initializing a quantum computing system simulator for simulating multiple layers of a quantum system including one or more non-quantum layers and one or more physical quantum device layers of the quantum system; simulating a first set of operations of the one or more non-quantum layers of the quantum system to generate first simulation results; simulating a second set of operations of the one or more quantum device layers of the quantum system to generate second simulation results; analyzing the first and second simulation results to provide at least one configuration recommendation for the quantum system.
    Type: Grant
    Filed: May 5, 2018
    Date of Patent: April 19, 2022
    Assignee: Intel Corporation
    Inventors: Anne Matsuura, Sonika Johri, Justin Hogaboam
  • Publication number: 20210182724
    Abstract: Apparatus and method for specifying quantum operation parallelism. For example, one embodiment of an apparatus comprises: instruction fetch circuitry to fetch a plurality of quantum instructions from a memory or a cache; slice-based instruction processing circuitry to identify quantum circuit slices comprising sets of one or more of the plurality of quantum instructions; and one or more instruction decoders to decode the quantum instructions to generate quantum microoperations; and quantum execution circuitry to execute sets of the quantum microoperations in parallel based on the quantum circuit slices.
    Type: Application
    Filed: December 13, 2019
    Publication date: June 17, 2021
    Inventors: XIANG ZOU, JUSTIN HOGABOAM, ADAM HOLMES, SONIKA JOHRI
  • Publication number: 20210173660
    Abstract: Parallel streaming apparatus and method for parallel quantum computations.
    Type: Application
    Filed: December 6, 2019
    Publication date: June 10, 2021
    Inventors: JUSTIN HOGABOAM, XIANG ZOU, SHAVINDRA PREMARATNE, NADER KHAMMASSI
  • Patent number: 10922166
    Abstract: Apparatus and method including a probabilistic compute element for analyzing measured quantum values and responsively adjusting error correction parameters. For example, one embodiment of an apparatus comprises: a quantum controller to generate physical pulses directed to qubits on a quantum processor in response to operations specified in a quantum runtime; quantum measurement circuitry to measure quantum values associated with the qubits following completion of at least a first cycle of quantum runtime operations; and a probabilistic compute engine to analyze the one or more quantum values using inferencing and to responsively adjust a quantum error correction depth value for minimizing a number of errors to be detected on subsequent cycles of the quantum runtime.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: February 16, 2021
    Assignee: Intel Corporation
    Inventor: Justin Hogaboam
  • Publication number: 20200310908
    Abstract: Apparatus and method including a probabilistic compute element for analyzing measured quantum values and responsively adjusting error correction parameters. For example, one embodiment of an apparatus comprises: a quantum controller to generate physical pulses directed to qubits on a quantum processor in response to operations specified in a quantum runtime; quantum measurement circuitry to measure quantum values associated with the qubits following completion of at least a first cycle of quantum runtime operations; and a probabilistic compute engine to analyze the one or more quantum values using inferencing and to responsively adjust a quantum error correction depth value for minimizing a number of errors to be detected on subsequent cycles of the quantum runtime.
    Type: Application
    Filed: March 27, 2019
    Publication date: October 1, 2020
    Inventor: JUSTIN HOGABOAM
  • Publication number: 20200201379
    Abstract: Apparatus and method for dynamically adjusting a quantum computer clock frequency. For example, one embodiment of an apparatus comprises: a quantum execution unit to execute quantum operations specified by a quantum runtime; a qubit drive controller to translate the quantum operations into physical pulses directed to qubits on a quantum chip at a first cycle frequency; a spin echo sequencer to issue spin echo command sequences to cause the qubit drive controller to generate a sequence of spin echo pulses at the first cycle frequency; and qubit measurement circuitry to measure the qubits and to store qubit timing data for each qubit, the qubit timing data indicating a coherence time or an amount of computational time available for each qubit to perform quantum operations.
    Type: Application
    Filed: December 21, 2018
    Publication date: June 25, 2020
    Inventors: Justin Hogaboam, Sonika Johri, Anne Matsuura
  • Publication number: 20190042972
    Abstract: Apparatus and method for injected spin echo sequences in a quantum processor. For example, one embodiment of a processor comprises a decoder to decode quantum instructions to generate quantum microoperations (uops) and non-quantum instructions to generate non-quantum uops; execution circuitry to execute the quantum uops and non-quantum uops; a corrective sequence data structure to identify and/or store corrective sets of uops for one or more of the quantum instructions; wherein the decoder is to query the corrective sequence data structure upon receiving a first quantum instruction to determine if one or more corrective uops exist and if the one or more corrective uops exist, then to submit the one or more corrective uops for execution by the execution circuitry.
    Type: Application
    Filed: September 27, 2018
    Publication date: February 7, 2019
    Inventors: Xiang Zou, Justin Hogaboam