Abstract: A data storage device may comprise an array of flash memory devices and a controller coupled thereto, configured to program and read data from the array responsive to received data access commands. The array may comprise a plurality of blocks, each comprising a plurality of flash pages (F-Pages), each of which comprising an integer number of one or more error correcting code pages (E-Pages), at least some of which comprising a data portion and an error correction code (ECC) portion. The controller may be configured to store a plurality of logical pages (L-Pages) in one or more of the plurality of E-Pages, at least some being unaligned with boundaries of the E-Pages; and to adjust, in at least one of the blocks, the size of the ECC portion and correspondingly adjust the size of the data portion of the E-Pages.

Abstract: New and improved methods and systems for modeling the performance of selected company metrics. Multiple, non-traditional sets of objective data along with mathematical analytical techniques are used to provide transparency and visibility into company performance relating to the particular metrics. Company inflection points and changes in strategy may be identified. The performance of a company and/or the performance of a selected industry or industry sector may be analyzed.

Abstract: A method of performing an atomic write command in a data storage device comprising a volatile memory and a plurality of non-volatile memory devices configured to store a plurality of physical pages. The method may comprise storing data in a plurality of logical pages (L-Pages), each associated with a logical address. A logical-to-physical address translation map may be maintained in the volatile memory, and may be configured to enable determination of a physical location, within one or more of the physical pages, of the data referenced by each logical address. The data specified by a received atomic write command may be stored one or more L-Pages. Updates to the entry or entries in the translation map associated with the L-Page(s) storing the data specified by the atomic write command may be deferred until all L-Pages storing data specified by the atomic write command have been written in a power-safe manner.

Abstract: New and improved methods and systems for modeling the performance of selected company metrics. Multiple, nontraditional sets of objective data along with mathematical analytical techniques are used to provide transparency and visibility into company performance relating to the particular metrics. Company inflection points and changes in strategy may be identified. The performance of a company and/or the performance of a selected industry or industry sector may be analyzed.

Abstract: New and improved methods and systems for modeling the performance of selected company metrics. Multiple, nontraditional sets of objective data along with mathematical analytical techniques are used to provide transparency and visibility into company performance relating to the particular metrics. Company inflection points and changes in strategy may be identified. The performance of a company and/or the performance of a selected industry or industry sector may be analyzed.

Abstract: New and improved methods and systems for modeling the performance of selected company metrics. Multiple, non-traditional sets of objective data along with mathematical analytical techniques are used to provide transparency and visibility into company performance relating to the particular metrics. Company inflection points and changes in strategy may be identified. The performance of a company and/or the performance of a selected industry or industry sector may be analyzed.

Abstract: A parity checking circuit which includes a microprocessor, instruction memory, a parity checker, an address capture device, a data bus connected to the microprocessor, the instruction memory and the parity checker, and an address bus connected to the microprocessor, the instruction memory and the address capture device. The instruction memory sends a parity bit to the parity checker, and the parity checker compare an address it receives from the address bus to the parity bit it receives from the instruction memory. If a parity error is detected, an error signal is sent to the address capture device and the address capture device captures the address for subsequent storage in a storage device, such as flash memory. The circuit also includes registers and a watchdog reset device which facilitates a system level reset at the command of the microprocessor.

Abstract: A parity checking circuit which includes a microprocessor, instruction memory, a parity checker, an address capture device, a data bus connected to the microprocessor, the instruction memory and the parity checker, and an address bus connected to the microprocessor, the instruction memory and the address capture device. The instruction memory sends a parity bit to the parity checker, and the parity checker compare an address it receives from the address bus to the parity bit it receives from the instruction memory. If a parity error is detected, an error signal is sent to the address capture device and the address capture device captures the address for subsequent storage in a storage device, such as flash memory. The circuit also includes registers and a watchdog reset device which facilitates a system level reset at the command of the microprocessor.

Abstract: A boat canopy mounting system having a front mounting assembly and a rear mounting assembly. The mounting system is able to secure boat canopies and other tops or sunshades to boat towers. The mounting system is further able to be employed on boat towers of varying configurations without any modifications. To accomplish this feature, the rear mounting assembly may include a plurality of clamp mounting locations such that an installer may selectively choose the clamp mounting locations to accommodate boat towers of varying design.

Abstract: New and improved methods and systems for modeling the performance of selected company metrics. Multiple, non-traditional sets of objective data along with mathematical analytical techniques are used to provide transparency and visibility into company performance relating to the particular metrics. Company inflection points and changes in strategy may be identified. The performance of a company and/or the performance of a selected industry or industry sector may be analyzed.

Abstract: This invention is an apparatus designed to secure members of one frame work to members of another framework most commonly found when trying to secure a boat canopy to a boat tower. The clamping apparatus is fully adjustable to allow for the many different configurations of towers and canopies.

Abstract: This invention is an apparatus designed to secure members of one frame work to members of another framework most commonly found when trying to secure a boat canopy to a boat tower. The clamping apparatus is fully adjustable to allow for the many different configurations of towers and canopies.

Abstract: A skid plate for manually propelled scooters is provided. This skid plate includes a bottom panel, side panels and a front panel for protecting the front, sides and bottom of the platform section of a scooter. Projecting rearwardly from the front panel are one or more nodal projections which are sized and configured to project into hollow stiffening members of a scooter's platform section. In a preferred embodiment, the bottom panel of the skid plate further includes an upwardly extending ridge sized and configured to press fit into a groove formed on the underside of a scooter's platform section.

Abstract: A method for reducing the resistivity of a copper layer on a wafer. A moisture containing seed layer of copper is formed over a layer of material on a wafer. The copper seed layer is treated by either heat or ions from a plasma to anneal out moisture thereby reducing its resistivity and improving its adhesion to the underlying layer. A moisture free copper layer is then deposited on top of the “clean” or treated copper seed layer.

Abstract: The invention provides a substrate support member and a purge guide for directing purge gas past the edge of a substrate and towards the outer perimeter of the chamber. The purge guide includes a plurality of holes disposed around the inner perimeter thereof to provide a purge gas passage and to prevent purge gas from interfering with the deposition chemistry on the surface of the substrate. A substrate support member is also provided having a vacuum chuck for securing a substrate to the upper surface thereof. The substrate support member preferably includes a shoulder on which the purge guide is supported during processing. The invention also provides a method for shielding an edge of a substrate by flowing a purge gas adjacent the edge of the substrate and then through a plurality of purge holes on a purge guide.