Patents by Inventor Justin N. Annes

Justin N. Annes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8816775
    Abstract: Apparatus, systems, and fabrication methods are provided for biasing amplifier arrangements inside device packages to a target quiescent current. In one embodiment, an amplifier device has an output interface and includes an amplifier arrangement having an amplifier output and impedance matching circuitry coupled between the amplifier output and the output interface. A method for biasing the amplifier arrangement involves measuring or otherwise obtaining a voltage between the amplifier output and the output interface, determining an estimated quiescent current through the amplifier arrangement based on that voltage, and adjusting a bias voltage provided to the input of the amplifier arrangement based on a difference between the estimated quiescent current. In exemplary embodiments, the bias voltage is adjusted until the estimated quiescent current is substantially equal to a target quiescent current.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: August 26, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Justin N Annes, Mario M Bokatius, Paul R Hart, Joseph Staudinger
  • Publication number: 20140070881
    Abstract: Apparatus, systems, and fabrication methods are provided for biasing amplifier arrangements inside device packages to a target quiescent current. In one embodiment, an amplifier device has an output interface and includes an amplifier arrangement having an amplifier output and impedance matching circuitry coupled between the amplifier output and the output interface. A method for biasing the amplifier arrangement involves measuring or otherwise obtaining a voltage between the amplifier output and the output interface, determining an estimated quiescent current through the amplifier arrangement based on that voltage, and adjusting a bias voltage provided to the input of the amplifier arrangement based on a difference between the estimated quiescent current. In exemplary embodiments, the bias voltage is adjusted until the estimated quiescent current is substantially equal to a target quiescent current.
    Type: Application
    Filed: September 13, 2012
    Publication date: March 13, 2014
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Justin N. Annes, Mario M. Bokatius, Paul R. Hart, Joseph Staudinger
  • Patent number: 7092684
    Abstract: An interference canceller 200 and corresponding method thereof operates to reduce the level of an interfering signal and includes a circulator 202 comprising a transmitter port, a receiver port and an antenna port, a transmission line 210 comprising a first end coupled to the transmitter port and a second end for coupling to a signal source; and a circuit 216, having an input coupled to the receiver port 206 and an output coupled 220 to the transmission line, for providing a phase shifted version of a signal coupled to the input at the output, wherein an interfering signal at the antenna port is reverse coupled to the transmission line by the circulator and coupled to the input of the circuit so as to reduce an amplitude of the interfering signal at the second end 212 of the transmission line. The interference canceller concepts may advantageously be used in a single transmitter version or in a multiple transmitter version (FIG. 4).
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: August 15, 2006
    Assignee: Motorola, Inc.
    Inventors: Robert Szopko, Justin N. Annes, Gregory T. Nash
  • Publication number: 20040192232
    Abstract: An interference canceller 200 and corresponding method thereof operates to reduce the level of an interfering signal and includes a circulator 202 comprising a transmitter port, a receiver port and an antenna port, a transmission line 210 comprising a first end coupled to the transmitter port and a second end for coupling to a signal source; and a circuit 216, having an input coupled to the receiver port 206 and an output coupled 220 to the transmission line, for providing a phase shifted version of a signal coupled to the input at the output, wherein an interfering signal at the antenna port is reverse coupled to the transmission line by the circulator and coupled to the input of the circuit so as to reduce an amplitude of the interfering signal at the second end 212 of the transmission line. The interference canceller concepts may advantageously be used in a single transmitter version or in a multiple transmitter version (FIG. 4).
    Type: Application
    Filed: March 31, 2003
    Publication date: September 30, 2004
    Applicant: MOTOROLA, INC.
    Inventors: Robert Szopko, Justin N. Annes, Gregory T. Nash