Patents by Inventor Justin Philpott
Justin Philpott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250015794Abstract: An electronic circuit for overvoltage protection of a transistor switch, including: an overvoltage comparator configured to detect an overvoltage on a Vsource of the transistor switch by comparing the Vsource to a Vref and output an on signal when overvoltage is detected; a switch configured to switch on by the on signal; a voltage regulator configured to regulate a Vclamp when the switch is switched on, the Vclamp regulates Vgate of the transistor switch; and a further comparator configured to detect a Vcc of the transistor switch and output an off signal when Vcc is below a threshold voltage, the switch is configured to switch off by the off signal, and the voltage regulator and the further comparator switch off when the switch is switched off.Type: ApplicationFiled: July 1, 2024Publication date: January 9, 2025Applicant: NEXPERIA B.V.Inventors: Paulo Lookman, Justin Philpott, Patrick Zeelen
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Publication number: 20240418766Abstract: An electronic circuit for sensing a current through a pass FET is provided. A first sense circuit passes a first sense current in case a difference between a supply voltage and a source voltage of the pass FET and is small, and a second sense circuit passes a second sense current in case the difference between the supply voltage and the source voltage of the pass FET is large. The first sense current and the second sense current are representative of the current through the pass FET.Type: ApplicationFiled: June 13, 2024Publication date: December 19, 2024Applicant: NEXPERIA B.V.Inventors: Patrick Zeelen, Paulo Lookman, Balasubramaniam Shammugasamy, Justin Philpott
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Publication number: 20240243569Abstract: A trigger circuit for controlling a electrostatic discharge (ESD), protection switch is provided. The present disclosure further relates to a high-voltage trigger circuit for use in eFuse (electronic fuse), load switch or ideal diode applications, or in any other application with a large n-channel FET between two pins. The trigger circuit ensures that the ESD protection gate can be left floating after the ESD event.Type: ApplicationFiled: January 17, 2024Publication date: July 18, 2024Applicant: NEXPERIA B.V.Inventors: Walter Luis Tercariol, Justin Philpott
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Patent number: 11258409Abstract: Aspects of the present disclosure provide a high voltage switch with a fast turn-off. An example power supply circuit generally includes a capacitive element for coupling to a power terminal of an amplifier, a first switch configured to be closed in a first mode and to be open in a second mode, a second switch coupled in series between the first switch and the capacitive element and configured to be closed in the first mode and to be open in the second mode, a first circuit coupled to the first switch and configured to charge the capacitive element and power the amplifier in the first mode, and a buffer circuit having an output coupled to a first node and configured to output a first voltage level greater than half of a second voltage level at a second node.Type: GrantFiled: July 15, 2020Date of Patent: February 22, 2022Assignee: QUALCOMM IncorporatedInventors: Justin Philpott, Xiaocheng Jing, Jingxue Lu, Iulian Mirea
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Publication number: 20220021348Abstract: Aspects of the present disclosure provide a high voltage switch with a fast turn-off. An example power supply circuit generally includes a capacitive element for coupling to a power terminal of an amplifier, a first switch configured to be closed in a first mode and to be open in a second mode, a second switch coupled in series between the first switch and the capacitive element and configured to be closed in the first mode and to be open in the second mode, a first circuit coupled to the first switch and configured to charge the capacitive element and power the amplifier in the first mode, and a buffer circuit having an output coupled to a first node and configured to output a first voltage level greater than half of a second voltage level at a second node.Type: ApplicationFiled: July 15, 2020Publication date: January 20, 2022Inventors: Justin PHILPOTT, Xiaocheng JING, Jingxue LU, Iulian MIREA
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Patent number: 10958168Abstract: Methods and apparatus for operating a switched-mode power supply (SMPS). One example method generally includes comparing a signal representative of an amount of current across an inductive element of the SMPS with at least three thresholds, selecting a configuration of the SMPS based on the comparison, and configuring the SMPS based on the selection.Type: GrantFiled: May 30, 2019Date of Patent: March 23, 2021Assignee: QUALCOMM IncorporatedInventors: Linfei Guo, Chengwu Tao, Joseph Duncan, Xiaocheng Jing, Amir Parayandeh, Justin Philpott
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Patent number: 10924017Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for operating a switched-mode power supply (SMPS). One example method generally includes selecting a first output of a plurality of outputs of the SMPS based on a power demand associated with each of the plurality of outputs if a voltage at the first output is less than a reference voltage associated with the first output, by selecting as the first output one of the plurality of outputs having the highest power demand, and based on an amount of overcharge associated with the first output if the voltage at the first output is greater than the reference voltage, by selecting as the first output one of the plurality of outputs having the lowest amount of overcharge. The method may also include directing current across an inductive element of the SMPS to the first output based on the selection.Type: GrantFiled: June 13, 2019Date of Patent: February 16, 2021Assignee: QUALCOMM IncorporatedInventors: Linfei Guo, Chengwu Tao, Joseph Duncan, Amir Parayandeh, Xiaocheng Jing, Justin Philpott, Lin Xue
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Publication number: 20200395848Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for operating a switched-mode power supply (SMPS). One example method generally includes selecting a first output of a plurality of outputs of the SMPS based on a power demand associated with each of the plurality of outputs if a voltage at the first output is less than a reference voltage associated with the first output, by selecting as the first output one of the plurality of outputs having the highest power demand, and based on an amount of overcharge associated with the first output if the voltage at the first output is greater than the reference voltage, by selecting as the first output one of the plurality of outputs having the lowest amount of overcharge. The method may also include directing current across an inductive element of the SMPS to the first output based on the selection.Type: ApplicationFiled: June 13, 2019Publication date: December 17, 2020Inventors: Linfei GUO, Chengwu TAO, Joseph DUNCAN, Amir PARAYANDEH, Xiaocheng JING, Justin PHILPOTT, Lin XUE
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Publication number: 20200381993Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for operating a switched-mode power supply (SMPS). One example method generally includes comparing a signal representative of an amount of current across an inductive element of the SMPS with at least three thresholds, selecting a configuration of the SMPS based on the comparison, and configuring the SMPS based on the selection.Type: ApplicationFiled: May 30, 2019Publication date: December 3, 2020Inventors: Linfei GUO, Chengwu TAO, Joseph DUNCAN, Xiaocheng JING, Amir PARAYANDEH, Justin PHILPOTT
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Patent number: 10615796Abstract: Certain aspects of the present disclosure provide methods and apparatus for level shifting an input signal ranging between certain voltage levels to generate an output signal ranging between other voltage levels with low power, high speed, and immunity to noise. One example level-shifting circuit generally includes a node for receiving an input signal ranging between a first voltage level and a second voltage level, a first circuit path coupled to the node and configured to level shift the input signal to generate an output signal ranging between a third voltage level and a fourth voltage level, a pulse generator coupled to the node and configured to generate a pulse based on a transition in the input signal between the first and second voltage levels, and a second circuit path connected in parallel with the first path and configured to temporarily short the first path based on the generated pulse.Type: GrantFiled: July 25, 2017Date of Patent: April 7, 2020Assignee: QUALCOMM IncorporatedInventors: Zhiqing Zhang, Brett Walker, Chi Fan Yung, Justin Philpott, Joseph Duncan
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Publication number: 20180034466Abstract: Certain aspects of the present disclosure provide methods and apparatus for level shifting an input signal ranging between certain voltage levels to generate an output signal ranging between other voltage levels with low power, high speed, and immunity to noise. One example level-shifting circuit generally includes a node for receiving an input signal ranging between a first voltage level and a second voltage level, a first circuit path coupled to the node and configured to level shift the input signal to generate an output signal ranging between a third voltage level and a fourth voltage level, a pulse generator coupled to the node and configured to generate a pulse based on a transition in the input signal between the first and second voltage levels, and a second circuit path connected in parallel with the first path and configured to temporarily short the first path based on the generated pulse.Type: ApplicationFiled: July 25, 2017Publication date: February 1, 2018Inventors: Zhiqing ZHANG, Brett WALKER, Chi Fan YUNG, Justin PHILPOTT, Joseph DUNCAN
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Patent number: 7969698Abstract: A method and apparatus to provide electrostatic discharge (ESD) protection to electronic circuits using a gate clamp circuit.Type: GrantFiled: May 30, 2008Date of Patent: June 28, 2011Assignee: Cypress Semiconductor CorporationInventors: George M. Ansel, Muthukumar Nagarajan, Justin Philpott
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Publication number: 20080225451Abstract: A method and apparatus to provide electrostatic discharge (ESD) protection to electronic circuits using a gate clamp circuit.Type: ApplicationFiled: May 30, 2008Publication date: September 18, 2008Inventors: George M. Ansel, Muthukumar Nagarajan, Justin Philpott
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Patent number: 7385793Abstract: A method and apparatus to provide electrostatic discharge (ESD) protection to electronic circuits using a gate clamp circuit.Type: GrantFiled: January 24, 2006Date of Patent: June 10, 2008Assignee: Cypress Semiconductor CorporationInventors: George M. Ansel, Muthukumar Nagarajan, Justin Philpott