Patents by Inventor Justin Song

Justin Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10712796
    Abstract: A non-transitory computer readable storage medium having stored thereon instructions, the instructions being executable by one or more processors to perform operations including: receiving, by a calibration module executed by the one or more processors, a calibration request including (i) a workload type, (ii) a list of compute nodes belonging to a distributed computer system, and (iii) one or more frequencies; responsive to identifying the workload type as a clustered workload type, instructing a plurality of compute nodes on the list of compute nodes to begin processing a workload of the workload type; and responsive to identifying the workload type as a clustered workload type, instructing a compute node on the list of compute nodes to begin processing the workload of the workload type is shown.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: July 14, 2020
    Assignee: INTEL CORPORATION
    Inventors: Muralidhar Rajappa, Andy Hoffman, Devadatta Bodas, Justin Song, James Alexander
  • Patent number: 10289183
    Abstract: A non-transitory computer readable storage medium storing instructions executable by one or more processors of a distributed computer system to perform operations including determining whether a power consumed by the distributed computer system is greater than a power allocated to the distributed computer system, responsive to determining the power consumed by the distributed computer system is greater than the power allocated to the distributed computer system, determining whether all jobs being processed by the distributed computer system are processing at a lowest power state for each job, wherein a job includes one or more calculations performed by the one or more processors of the distributed computer system and responsive to determining all jobs being processed by the distributed computer system are processing at a lowest power state for each job, suspending a job having a lowest priority among all jobs being processed by the distributed computer system is shown.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: May 14, 2019
    Assignee: INTEL CORPORATION
    Inventors: Muralidhar Rajappa, Andy Hoffman, Devadatta Bodas, Justin Song, James Alexander
  • Patent number: 9575536
    Abstract: A non-transitory computer readable storage medium having stored thereon instructions executable by one or more processors to perform operations including: receiving a plurality of input parameters including (i) a workload type, (ii) a list of selected nodes belonging to a distributed computer system, and (iii) a list of frequencies; responsive to receiving the plurality of workload parameters, retrieving calibration data from a calibration database; generating a power estimate based on the plurality of workload parameters and the calibration data; and providing the power estimate to a resource manager is shown. Alternatively, the input parameters may include (i) a workload type, (ii) a list of selected nodes belonging to a distributed computer system, and (iii) an amount of available power, wherein the estimator may provide an estimation of the frequency at which the nodes should operate to utilize as much of the available power without exceeding the available power.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: February 21, 2017
    Assignee: Intel Corporation
    Inventors: Muralidhar Rajappa, Andy Hoffman, Devadatta Bodas, Justin Song, James Alexander, Joseph A. Schaefer, Sunil Mahawar
  • Patent number: 9285855
    Abstract: In one embodiment, the present invention includes a method for providing power state change information from a plurality of cores of a processor to a predictor at a periodic interval and generating a prediction to indicate a predicted operation level of the cores during a next operating period. Other embodiments are described and claimed.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: March 15, 2016
    Assignee: Intel Corporation
    Inventors: Justin Song, Qian Diao
  • Publication number: 20160054783
    Abstract: A non-transitory computer readable storage medium having stored thereon instructions, the instructions being executable by one or more processors to perform operations including: receiving, by a calibration module executed by the one or more processors, a calibration request including (i) a workload type, (ii) a list of compute nodes belonging to a distributed computer system, and (iii) one or more frequencies; responsive to identifying the workload type as a clustered workload type, instructing a plurality of compute nodes on the list of compute nodes to begin processing a workload of the workload type; and responsive to identifying the workload type as a clustered workload type, instructing a compute node on the list of compute nodes to begin processing the workload of the workload type is shown.
    Type: Application
    Filed: December 24, 2014
    Publication date: February 25, 2016
    Inventors: Muralidhar Rajappa, Andy Hoffman, Devadatta Bodas, Justin Song, James Alexander
  • Publication number: 20160054779
    Abstract: A method of managing power and performance of a High-performance computing (HPC) systems, including: determining a power budget for a HPC system, wherein the HPC system includes a plurality of interconnected HPC nodes operable to execute a job, determining a power and cooling capacity of the HPC system, allocating the power budget to the job to maintain a power consumption of the HPC system within the power budget and the power and cooling capacity of the HPC system, and executing the job on selected HPC nodes is shown.
    Type: Application
    Filed: December 24, 2014
    Publication date: February 25, 2016
    Inventors: Devadatta BODAS, Muralidhar RAJAPPA, Justin SONG, Andy HOFFMAN, Joseph A. SCHAEFER, Sunil MAHAWAR
  • Publication number: 20160054775
    Abstract: A non-transitory computer readable storage medium having stored thereon instructions executable by one or more processors to perform operations including: receiving a plurality of input parameters including (i) a workload type, (ii) a list of selected nodes belonging to a distributed computer system, and (iii) a list of frequencies; responsive to receiving the plurality of workload parameters, retrieving calibration data from a calibration database; generating a power estimate based on the plurality of workload parameters and the calibration data; and providing the power estimate to a resource manager is shown. Alternatively, the input parameters may include (i) a workload type, (ii) a list of selected nodes belonging to a distributed computer system, and (iii) an amount of available power, wherein the estimator may provide an estimation of the frequency at which the nodes should operate to utilize as much of the available power without exceeding the available power.
    Type: Application
    Filed: December 24, 2014
    Publication date: February 25, 2016
    Inventors: Muralidhar Rajappa, Andy Hoffman, Devadatta Bodas, Justin Song, James Alexander, Joseph A. Schaefer, Sunil Mahawar
  • Publication number: 20160054781
    Abstract: A non-transitory computer readable storage medium storing instructions executable by one or more processors of a distributed computer system to perform operations including determining whether a power consumed by the distributed computer system is greater than a power allocated to the distributed computer system, responsive to determining the power consumed by the distributed computer system is greater than the power allocated to the distributed computer system, determining whether all jobs being processed by the distributed computer system are processing at a lowest power state for each job, wherein a job includes one or more calculations performed by the one or more processors of the distributed computer system and responsive to determining all jobs being processed by the distributed computer system are processing at a lowest power state for each job, suspending a job having a lowest priority among all jobs being processed by the distributed computer system is shown.
    Type: Application
    Filed: December 24, 2014
    Publication date: February 25, 2016
    Inventors: Muralidhar Rajappa, Andy Hoffman, Devadatta Bodas, Justin Song, James Alexander
  • Publication number: 20120023355
    Abstract: In one embodiment, the present invention includes a method for providing power state change information from a plurality of cores of a processor to a predictor at a periodic interval and generating a prediction to indicate a predicted operation level of the cores during a next operating period. Other embodiments are described and claimed.
    Type: Application
    Filed: August 12, 2011
    Publication date: January 26, 2012
    Inventors: Justin Song, Qian Diao
  • Patent number: 8024590
    Abstract: In one embodiment, the present invention includes a method for providing power state change information from a plurality of cores of a processor package to a predictor at a periodic interval and generating a prediction to indicate a predicted operation level of the cores during a next operating period. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 10, 2007
    Date of Patent: September 20, 2011
    Assignee: Intel Corporation
    Inventors: Justin Song, Qian Diao
  • Patent number: 7966506
    Abstract: A power management unit (PMU) may promote a processing core from a working state to a first non-working power saving state after receiving a signal from an automatic core C-state promotion (ACCP) unit. An OS component may detect the idling of the processing core and may initiate the ACCP. The ACCP may initiate the PMU to promote the processing core to a first non-working power saving state. The ACCP may track the residency time of the processing core in the first non-working power saving state and may initiate the PMU to promote the processing core to a next non-working power saving state if residency time of the processing core in the first non-working power saving state exceeds a first value. The ACCP may initiate the PMU to demote the processing core back to the working state if a break event occurs during the residency time.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: June 21, 2011
    Assignee: Intel Corporation
    Inventors: Devadatta V Bodas, Justin Song
  • Patent number: 7962771
    Abstract: A method, system, and apparatus may route an interrupt to a first core of a plurality of cores of a multi-core system. If the first core is in an idle or low power state, or operating in a power state at or below a threshold power state, a core in a least idle state may be found. The interrupt may be rerouted to and processed by the core in the least idle state. Cores in a multi-core system may be rated based on for example, power states or other characteristics, and interrupts may be assigned based on these ratings. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: June 14, 2011
    Assignee: Intel Corporation
    Inventors: Justin Song, Devadatta V. Bodas, Ohad Falik, Alon Naveh, Ilan Pardo, Anil Aggarwal, Sridhar Muthrasanallur, James B. Crossland
  • Publication number: 20090172423
    Abstract: A method, system, and apparatus may route an interrupt to a first core of a plurality of cores of a multi-core system. If the first core is in an idle or low power state, or operating in a power state at or below a threshold power state, a core in a least idle state may be found. The interrupt may be rerouted to and processed by the core in the least idle state. Cores in a multi-core system may be rated based on for example, power states or other characteristics, and interrupts may be assigned based on these ratings. Other embodiments are described and claimed.
    Type: Application
    Filed: December 31, 2007
    Publication date: July 2, 2009
    Inventors: Justin Song, Devadatta V. Bodas, Ohad Falik, Alon Naveh, Ilan Pardo, Anil Aggarwal, Sridhar Muthrasanallur, James B. Crossland
  • Publication number: 20090158067
    Abstract: A power management unit (PMU) may promote a processing core from a working state to a first non-working power saving state after receiving a signal from an automatic core C-state promotion (ACCP) unit. An OS component may detect the idling of the processing core and may initiate the ACCP. The ACCP may initiate the PMU to promote the processing core to a first non-working power saving state. The ACCP may track the residency time of the processing core in the first non-working power saving state and may initiate the PMU to promote the processing core to a next non-working power saving state if residency time of the processing core in the first non-working power saving state exceeds a first value. The ACCP may initiate the PMU to demote the processing core back to the working state if a break event occurs during the residency time.
    Type: Application
    Filed: December 12, 2007
    Publication date: June 18, 2009
    Inventors: Devadatta V. Bodas, Justin Song
  • Publication number: 20090150696
    Abstract: In one embodiment, a processor package is controlled to be in a package low power state for a first portion of an operation interval and in a package active state for a second portion of the operation interval. To enable the low power state, operations scheduled during the first portion are delayed until the second portion. Other embodiments are described and claimed.
    Type: Application
    Filed: December 10, 2007
    Publication date: June 11, 2009
    Inventors: Justin Song, Qian Diao
  • Publication number: 20090150695
    Abstract: In one embodiment, the present invention includes a method for providing power state change information from a plurality of cores of a processor package to a predictor at a periodic interval and generating a prediction to indicate a predicted operation level of the cores during a next operating period. Other embodiments are described and claimed.
    Type: Application
    Filed: December 10, 2007
    Publication date: June 11, 2009
    Inventors: Justin Song, Qian Diao
  • Patent number: 7437270
    Abstract: Some embodiments of the invention may operate to measure a first output performance metric value associated with a current operation frequency of a processor, to set a trial operation frequency of the processor, and to measure a second output performance metric value associated with the trial operation frequency. If the measured performance variation is less than a specified acceptable performance variation, the trial operation frequency may be selected as a subsequent determined operation frequency.
    Type: Grant
    Filed: March 30, 2006
    Date of Patent: October 14, 2008
    Assignee: Intel Corporation
    Inventors: Justin Song, Devadatta Bodas
  • Publication number: 20070239398
    Abstract: Some embodiments of the invention may operate to measure a first output performance metric value associated with a current operation frequency of a processor, to set a trial operation frequency of the processor, and to measure a second output performance metric value associated with the trial operation frequency. If the measured performance variation is less than a specified acceptable performance variation, the trial operation frequency may be selected as a subsequent determined operation frequency.
    Type: Application
    Filed: March 30, 2006
    Publication date: October 11, 2007
    Inventors: Justin Song, Devadatta Bodas