Patents by Inventor Justin Sung-Jit Wong

Justin Sung-Jit Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10094533
    Abstract: A marking device includes a light-emitting unit configured to emit light, a housing configured to accommodate the light-emitting unit, and a support configured to support the housing. The housing can include a transmitting portion configured to transmit the light from the light-emitting unit through a circumferential portion of the housing, and a roof covering the light-emitting unit accommodated in the housing. The housing can include a side wall formed between every two adjacent windows of the plurality of windows.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: October 9, 2018
    Assignees: Honda Motor Co., Ltd., ZMP Inc.
    Inventors: Minami Kigami, Makoto Yamanaka, Tsutomu Mizoroke, Yoshihisa Hirose, Kensei Yamashita, Masaki Segawa, Kazuhiro Ishikawa, Justin Sung Jit Wong
  • Publication number: 20170284625
    Abstract: A marking device includes a light-emitting unit configured to emit light, a housing configured to accommodate the light-emitting unit, and a support configured to support the housing. The housing can include a transmitting portion configured to transmit the light from the light-emitting unit through a circumferential portion of the housing, and a roof covering the light-emitting unit accommodated in the housing. The housing can include a side wall formed between every two adjacent windows of the plurality of windows.
    Type: Application
    Filed: March 29, 2017
    Publication date: October 5, 2017
    Inventors: Minami Kigami, Makoto Yamanaka, Tsutomu Mizoroke, Yoshihisa Hirose, Kensei Yamashita, Masaki Segawa, Kazuhiro Ishikawa, Justin Sung Jit Wong
  • Patent number: 8552740
    Abstract: A method of measuring signal delay in a integrated circuit comprising applying a common clock signal at a circuit input and output, applying a test signal at the circuit input, detecting a corresponding output signal at the circuit output and detecting whether the test signal and output signal occur in a common part of the clock signal.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: October 8, 2013
    Assignee: Maxeler Technologies Limited
    Inventors: Peter Ying Kay Cheung, Nicholas Peter Sedcole, Justin Sung-Jit Wong