Abstract: A semiconductor device having a contact structure is provided. The semiconductor device includes: a conductive region; a first film and a second film which are formed over the conductive region to realize a layer; and a contact electrode which extends through the layer to the conductive region, and is formed so as to replace a portion of the layer with a portion of the contact electrode, where the portion of the layer is constituted by only the first film, only the second film, or both of a portion of the first film and a portion of the second film, and the portion of the first film occupies a major part of the portion of the layer.

Abstract: A disclosed semiconductor integrated circuit device includes a semiconductor substrate; and multiple semiconductor elements disposed on the semiconductor substrate. The semiconductor elements include an n-channel MOS transistor and a p-channel MOS transistor. The n-channel MOS transistor is covered by a tensile stress film, and the p-channel MOS transistor is covered by a compressive stress film. A dummy region, the entire surface of which is covered by a combination of the tensile stress film and the compressive stress film, is disposed on the surface of the semiconductor substrate.

Abstract: A semiconductor device having a contact structure is provided. The semiconductor device includes: a conductive region; a first film and a second film which are formed over the conductive region to realize a layer; and a contact electrode which extends through the layer to the conductive region, and is formed so as to replace a portion of the layer with a portion of the contact electrode, where the portion of the layer is constituted by only the first film, only the second film, or both of a portion of the first film and a portion of the second film, and the portion of the first film occupies a major part of the portion of the layer.

Abstract: A method of manufacturing a semiconductor integrated circuit device which includes a semiconductor substrate; and multiple semiconductor elements disposed on the semiconductor substrate. The semiconductor elements include an n-channel MOS transistor and a p-channel MOS transistor. The n-channel MOS transistor is covered by a tensile stress film, and the p-channel MOS transistor is covered by a compressive stress film. A dummy region, the entire surface of which is covered by a combination of the tensile stress film and the compressive stress film, is disposed on the surface of the semiconductor substrate.

Abstract: A semiconductor device having a contact structure is provided. The semiconductor device includes: a conductive region; a first film and a second film which are formed over the conductive region to realize a layer; and a contact electrode which extends through the layer to the conductive region, and is formed so as to replace a portion of the layer with a portion of the contact electrode, where the portion of the layer is constituted by only the first film, only the second film, or both of a portion of the first film and a portion of the second film, and the portion of the first film occupies a major part of the portion of the layer.

Abstract: A method of manufacturing a semiconductor integrated circuit device which includes a semiconductor substrate; and multiple semiconductor elements disposed on the semiconductor substrate. The semiconductor elements include an n-channel MOS transistor and a p-channel MOS transistor. The n-channel MOS transistor is covered by a tensile stress film, and the p-channel MOS transistor is covered by a compressive stress film. A dummy region, the entire surface of which is covered by a combination of the tensile stress film and the compressive stress film, is disposed on the surface of the semiconductor substrate.

Abstract: A method of manufacturing a semiconductor device includes forming an isolation region defining an active region in a semiconductor substrate, forming a first insulating film over the semiconductor substrate, forming a second insulating film having etching properties different from those of the first insulating film over the first insulating film, selectively removing the second insulating film from a first region over the active region and the isolation region by dry etching using a fluorocarbon-based etching gas, removing a residual film formed by the dry etching over the first insulating film by exposure in an atmosphere containing oxygen, and selectively removing the first insulating film from the first region by wet etching.

Abstract: A buried local interconnect and method of forming the same counterdopes a region of a doped substrate to form a counterdoped isolation region. A hardmask is formed and patterned on the doped substrate, with a recess being etched through the patterned hardmask into the counterdoped region. Dielectric spacers are formed on the sidewalls of the recess, with a portion of the bottom of the recess being exposed. A metal is then deposited in the recess and reacted to form silicide at the bottom of the recess. The recess is filled with fill material, which is polished. The hardmask is then removed to form a silicide buried local interconnect.

Abstract: A semiconductor device fabrication method including: forming a gate conductor including a gate for a transistor in the first region, and a gate for a transistor in the second region, and a first film over a first stress film for covering the transistors; etching the first film from the second region by using a mask layer and etching the first film under the mask layer in the direction parallel to the surface of the semiconductor substrate by a first width from an edge of the first mask layer, and the first stress film from the second region; forming a second stress film covering the first stress film and the first film; etching the second stress film so that a portion of the second stress film overlaps a portion of the first stress film and a portion of the first film; and forming a contact hole connected with the gate conductor.

Abstract: A method of manufacturing a semiconductor device includes forming an isolation region defining an active region in a semiconductor substrate, forming a first insulating film over the semiconductor substrate, forming a second insulating film having etching properties different from those of the first insulating film over the first insulating film, selectively removing the second insulating film from a first region over the active region and the isolation region by dry etching using a fluorocarbon-based etching gas, removing a residual film formed by the dry etching over the first insulating film by exposure in an atmosphere containing oxygen, and selectively removing the first insulating film from the first region by wet etching.

Abstract: A method of manufacturing a semiconductor device includes forming an isolation region defining an active region in a semiconductor substrate, forming a first insulating film over the semiconductor substrate, forming a second insulating film having etching properties different from those of the first insulating film over the first insulating film, selectively removing the second insulating film from a first region over the active region and the isolation region by dry etching using a fluorocarbon-based etching gas, removing a residual film formed by the dry etching over the first insulating film by exposure in an atmosphere containing oxygen, and selectively removing the first insulating film from the first region by wet etching.

Abstract: A buried local interconnect and method of forming the same counterdopes a region of a doped substrate to form a counterdoped isolation region. A hardmask is formed and patterned on the doped substrate, with a recess being etched through the patterned hardmask into the counterdoped region. Dielectric spacers are formed on the sidewalls of the recess, with a portion of the bottom of the recess being exposed. A metal is then deposited in the recess and reacted to form silicide at the bottom of the recess. The recess is filled with fill material, which is polished. The hardmask is then removed to form a silicide buried local interconnect.

Abstract: A buried local interconnect and method of forming the same counterdopes a region of a doped substrate to form a counterdoped isolation region. A hardmask is formed and patterned on the doped substrate, with a recess being etched through the patterned hardmask into the counterdoped region. Dielectric spacers are formed on the sidewalls of the recess, with a portion of the bottom of the recess being exposed. A metal is then deposited in the recess and reacted to form silicide at the bottom of the recess. The recess is filled with fill material, which is polished. The hardmask is then removed to form a silicide buried local interconnect.

Abstract: A method of manufacturing a semiconductor device has forming a first nitride layer over a substrate, forming a first oxide layer on the first nitride layer, forming a second nitride layer on the first oxide layer, forming a photoresist layer over the second nitride layer, forming a opening in the photoresist layer, etching the second nitride layer using the photoresist layer as a mask such that the opening is reached to the first oxide layer, etching the first oxide layer using the second nitride layer as a mask such that the opening is reached to the first nitride layer, etching the first oxide layer such that bottom zone of the opening is increased in diameter, and etching the first nitride layer using the first oxide layer as a mask such that the opening is reached to the substrate thereby to form contact hole reaching to the substrate.

Abstract: A semiconductor device fabrication method including: forming a gate conductor including a gate for a transistor in the first region, and a gate for a transistor in the second region, and a first film over a first stress film for covering the transistors; etching the first film from the second region by using a mask layer and etching the first film under the mask layer in the direction parallel to the surface of the semiconductor substrate by a first width from an edge of the first mask layer, and the first stress film from the second region; forming a second stress film covering the first stress film and the first film; etching the second stress film so that a portion of the second stress film overlaps a portion of the first stress film and a portion of the first film; and forming a contact hole connected with the gate conductor.

Abstract: The semiconductor device comprises a silicon substrate 14 having a step formed in the surface which makes the surface in a flash memory cell region 10 lower than the surface in a peripheral circuit region 12; a device isolation region 20a formed in a trench 18 in the flash memory cell region 10; a device isolation region 20c formed in a trench 24 deeper than the trench 18 in the peripheral circuit region 12; a flash memory cell 46 including a floating gate 32 and a control gate 40 formed on the device region defined by the device isolation region 20a; and transistors 62, 66 formed on the device regions defined by the device isolation region 20c.

Abstract: A buried local interconnect and method of forming the same counterdopes a region of a doped substrate to form a counterdoped isolation region. A hardmask is formed and patterned on the doped substrate, with a recess being etched through the patterned hardmask into the counterdoped region. Dielectric spacers are formed on the sidewalls of the recess, with a portion of the bottom of the recess being exposed. A metal is then deposited in the recess and reacted to form silicide at the bottom of the recess. The recess is filled with fill material, which is polished. The hardmask is then removed to form a silicide buried local interconnect.

Abstract: A disclosed semiconductor integrated circuit device includes a semiconductor substrate; and multiple semiconductor elements disposed on the semiconductor substrate. The semiconductor elements include an n-channel MOS transistor and a p-channel MOS transistor. The n-channel MOS transistor is covered by a tensile stress film, and the p-channel MOS transistor is covered by a compressive stress film. A dummy region, the entire surface of which is covered by a combination of the tensile stress film and the compressive stress film, is disposed on the surface of the semiconductor substrate.

Abstract: A method of manufacturing a semiconductor device includes forming an isolation region defining an active region in a semiconductor substrate, forming a first insulating film over the semiconductor substrate, forming a second insulating film having etching properties different from those of the first insulating film over the first insulating film, selectively removing the second insulating film from a first region over the active region and the isolation region by dry etching using a fluorocarbon-based etching gas, removing a residual film formed by the dry etching over the first insulating film by exposure in an atmosphere containing oxygen, and selectively removing the first insulating film from the first region by wet etching.

Abstract: The semiconductor device comprises a silicon substrate 14 having a step formed in the surface which makes the surface in a flash memory cell region 10 lower than the surface in a peripheral circuit region 12; a device isolation region 20a formed in a trench 18 in the flash memory cell region 10; a device isolation region 20c formed in a trench 24 deeper than the trench 18 in the peripheral circuit region 12; a flash memory cell 46 including a floating gate 32 and a control gate 40 formed on the device region defined by the device isolation region 20a; and transistors 62, 66 formed on the device regions defined by the device isolation region 20c.