Abstract: Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode structure, the first pattern vertically extending to cross the electrodes and the second pattern horizontally extending to cross the semiconductor patterns.

Abstract: Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode structure, the first pattern vertically extending to cross the electrodes and the second pattern horizontally extending to cross the semiconductor patterns.

Abstract: Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode structure, the first pattern vertically extending to cross the electrodes and the second pattern horizontally extending to cross the semiconductor patterns.

Abstract: Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode structure, the first pattern vertically extending to cross the electrodes and the second pattern horizontally extending to cross the semiconductor patterns.

Abstract: Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode structure, the first pattern vertically extending to cross the electrodes and the second pattern horizontally extending to cross the semiconductor patterns.

Abstract: Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode structure, the first pattern vertically extending to cross the electrodes and the second pattern horizontally extending to cross the semiconductor patterns.

Abstract: Disclosed are an apparatus and a method for estimating a parameter of a multi path signal. The apparatus for estimating a parameter of a multi path signal includes: a plurality of pre-processing units configured to pre-process respective reception signals received through a plurality of antennas; a plurality of parameter converting units configured to approximate a parameter set of the respective pre-processed reception signals to have a sparse characteristic in a Doppler frequency and angle of arrival domain; and a parameter estimating unit configured to estimate an angle of arrival for a plurality of reception signals in each frequency region of the Doppler frequency and angle of arrival domain.

Abstract: Disclosed is an antenna array, including: a first antenna; a second antenna; and a dielectric substance, of which a height is determined based on a distance between the first and second antennas and forms of beam patterns of the first and second antennas. According to the antenna array according to the exemplary embodiments of the present invention, it is possible to decrease coupling between the antennas.

Abstract: A method and terminal for performing beamforming. The beamforming method of a terminal includes acquiring a beamforming signal, calculating a beamforming coefficient to correspond to locations of a transmitter and a receiver, based on the beamforming signal, acquiring sensor information of the terminal, estimating a channel parameter based on the sensor information, and determining a final beamforming coefficient based on the beamforming coefficient and the channel parameter.

Abstract: Provided is a semiconductor device including gate structures provided on a substrate, a separation insulating layer interposed between the gate structures, and a plurality of cell pillars connected to the substrate through each gate structure. Each gate structure may include horizontal electrodes vertically stacked on the substrate, and an interval between adjacent ones of the cell pillars is non-uniform.

Abstract: Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode structure, the first pattern vertically extending to cross the electrodes and the second pattern horizontally extending to cross the semiconductor patterns.

Abstract: Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode structure, the first pattern vertically extending to cross the electrodes and the second pattern horizontally extending to cross the semiconductor patterns.

Abstract: A method and terminal for performing beamforming. The beamforming method of a terminal includes acquiring a beamforming signal, calculating a beamforming coefficient to correspond to locations of a transmitter and a receiver, based on the beamforming signal, acquiring sensor information of the terminal, estimating a channel parameter based on the sensor information, and determining a final beamforming coefficient based on the beamforming coefficient and the channel parameter.

Abstract: Disclosed are an apparatus and a method for estimating a parameter of a multi path signal. The apparatus for estimating a parameter of a multi path signal includes: a plurality of pre-processing units configured to pre-process respective reception signals received through a plurality of antennas; a plurality of parameter converting units configured to approximate a parameter set of the respective pre-processed reception signals to have a sparse characteristic in a Doppler frequency and angle of arrival domain; and a parameter estimating unit configured to estimate an angle of arrival for a plurality of reception signals in each frequency region of the Doppler frequency and angle of arrival domain.

Abstract: Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode structure, the first pattern vertically extending to cross the electrodes and the second pattern horizontally extending to cross the semiconductor patterns.

Abstract: Disclosed is an antenna array, including: a first antenna; a second antenna; and a dielectric substance, of which a height is determined based on a distance between the first and second antennas and forms of beam patterns of the first and second antennas. According to the antenna array according to the exemplary embodiments of the present invention, it is possible to decrease coupling between the antennas.

Abstract: An apparatus for beamforming of a terminal acquires sensing information from an internal sensor, confirms whether the terminal is positioned in a street canyon of a road, and if it is confirmed that the terminal is positioned in the street canyon of a road, uses the sensing information to form beams of each antenna.

Abstract: Provided is a semiconductor device including gate structures provided on a substrate, a separation insulating layer interposed between the gate structures, and a plurality of cell pillars connected to the substrate through each gate structure. Each gate structure may include horizontal electrodes vertically stacked on the substrate, and an interval between adjacent ones of the cell pillars is non-uniform.

Abstract: A three-dimensional (3D) semiconductor memory device includes an electrode separation pattern, a stack structure, a data storage layer, and a channel structure. The electrode separation pattern is disposed on a substrate. A stack structure is disposed on a sidewall of the electrode separation pattern. The stack structure includes a corrugated sidewall opposite to the sidewall of the electrode separation pattern. The sidewall of the electrode separation pattern is vertical to the substrate. A data storage layer is disposed on the corrugated sidewall. A channel structure is disposed on the charge storage layer.

Abstract: Provided is a semiconductor device including gate structures provided on a substrate, a separation insulating layer interposed between the gate structures, and a plurality of cell pillars connected to the substrate through each gate structure. Each gate structure may include horizontal electrodes vertically stacked on the substrate, and an interval between adjacent ones of the cell pillars is non-uniform.