Abstract: A trenched stack-capacitor applied in a memory unit is formed through a simple process of manufacturing a stack capacitor with high density.

Abstract: A new method of simultaneously forming differential gate oxide for both 3 and 5 V transistors is described. A sacrificial silicon oxide layer is formed on the surface of a semiconductor substrate. Ions are implanted through the sacrificial silicon oxide layer into the planned 3 V transistor area of the semiconductor substrate wherein the implanted ions depress the oxidation rate of the semiconductor substrate. Alternatively, ions are implanted through the sacrificial silicon oxide layer into the planned 5 V transistor area of the semiconductor substrate wherein the implanted ions increase the oxidation rate of the semiconductor substrate. The sacrificial silicon oxide layer is removed and a layer of gate silicon oxide is grown on the surface of the semiconductor substrate.

Abstract: A method is described for fabricating a lightly doped drain MOS FET integrated circuit device with a peeling-free metal silicide gate electrode continues by annealing the gate oxide, the polysilicon layer and the metal silicide layer using a furnace process at a temperature more than about 920.degree. C. and for a time of less than about 40 minutes. A pattern of lightly doped regions is formed in the substrate by ion implantation using the structures as the mask. A low temperature silicon dioxide layer is blanket deposited over the surfaces of the structure. The pattern of lightly doped regions is driven in while maintaining the low temperature silicon oxide over the metal silicide layer by annealing at a temperature of more than about 920.degree. C. The blanket layer is etched to form a dielectric spacer structure upon the sidewalls of each of the gate electrode structures and over the adjacent portions of the substrate, and to remove the silicon oxide layer from the top surfaces of metal silicide layer.