Patents by Inventor Jyoji Hayashi

Jyoji Hayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor integrated circuit and system
    Patent number: 6680543
    Abstract: A semiconductor integrated circuit 10 includes a semiconductor substrate 1, an insulating layer 2 formed on the semiconductor substrate 1, and a bonding pad 3 formed on the insulating layer 2. The semiconductor substrate 1 has a region 4 facing the bonding pad 3 and a region 5 substantially surrounding at least a part of the region 4. The region 5 of the semiconductor substrate 1 is set substantially at an equipotential.
    Type: Grant
    Filed: September 9, 1999
    Date of Patent: January 20, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Jyoji Hayashi, Hiroshi Kimura, Hiroshi Shimomura
  • SEMICONDUCTOR INTEGRATED CIRCUIT AND SYSTEM
    Publication number: 20020053725
    Abstract: A semiconductor integrated circuit 10 includes a semiconductor substrate 1, an insulating layer 2 formed on the semiconductor substrate 1, and a bonding pad 3 formed on the insulating layer 2. The semiconductor substrate 1 has a region 4 facing the bonding pad 3 and a region 5 substantially surrounding at least a part of the region 4. The region 5 of the semiconductor substrate 1 is set substantially at an equipotential.
    Type: Application
    Filed: September 9, 1999
    Publication date: May 9, 2002
    Inventors: JYOJI HAYASHI, HIROSHI KIMURA, HIROSHI SHIMOMURA