Abstract: A logic level converter circuit for converting an ECL input signal to other type logic signal such as a TTL output signal comprises a differential comparator of an ECL type and an inverter which is formed by an output insulated-gate field-effect transistor and an output bipolar transistor connected in series between a higher potential power supply terminal and a lower potential power supply terminal. An output node of the differential comparator is directly connected to a gate of the output field-effect transistor and also coupled through a coupling capacitor to a base of the output bipolar transistor. An output of the differential comparator may be supplied to both the output transistors through an emitter follower circuit having a high driving capability. A bias voltage generating circuit may be provided for causing a DC bias current to flow in the output bipolar transistor.

Abstract: A semiconductor memory device operable at a high speed and having a high density of integration is disclosed. The memory device comprises a memory cell array consisting essentially of insulated-gate field effect transistors and peripheral circuits including bipolar transistors with their emitters coupled in common in an ECL configuration.

Abstract: An inverter circuit operating at a high speed and with low power consumption is disclosed, which comprises a first bipolar transistor having a collector coupled to the output of the circuit, a second bipolar transistor having a collector coupled to the base of the first transistor and means responsive to at least one input signal to produce a first signal for driving the first transistor and a second signal complementary to the first signal for driving the second transistor substantially at the same time.