Patents by Inventor Jyun-Hao LIN

Jyun-Hao LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • PIXEL ARRAY INCLUDING AIR GAP REFLECTION STRUCTURES
    Publication number: 20220165776
    Abstract: A pixel array may include air gap reflection structures under a photodiode of a pixel sensor to reflect photons that would otherwise partially refract or scatter through a bottom surface of a photodiode. The air gap reflection structures may reflect photons upward toward the photodiode so that the photons may be absorbed by the photodiode. This may increase the quantity of photons absorbed by the photodiode, which may increase the quantum efficiency of the pixel sensor and the pixel array.
    Type: Application
    Filed: November 20, 2020
    Publication date: May 26, 2022
    Inventors: Jyun-Hao LIN, Feng-Chien HSIEH, Yun-Wei CHENG, Kuo-Cheng LEE
  • Gradient doped region of recessed Fin forming a FinFET device
    Patent number: 11133415
    Abstract: An embodiment is a method of manufacturing a semiconductor device. The method includes forming a fin on a substrate. A gate structure is formed over the fin. A recess is formed in the fin proximate the gate structure. A gradient doped region is formed in the fin with a p-type dopant. The gradient doped region extends from a bottom surface of the recess to a vertical depth below the recess in the fin. A source/drain region is formed in the recess and on the gradient doped regions.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: September 28, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jyun-Hao Lin, Chun-Feng Nieh, Yu-Chang Lin, Huicheng Chang
  • Gradient Doped Region of Recessed Fin Forming a FinFET Device
    Publication number: 20200395481
    Abstract: An embodiment is a method of manufacturing a semiconductor device. The method includes forming a fin on a substrate. A gate structure is formed over the fin. A recess is formed in the fin proximate the gate structure. A gradient doped region is formed in the fin with a p-type dopant. The gradient doped region extends from a bottom surface of the recess to a vertical depth below the recess in the fin. A source/drain region is formed in the recess and on the gradient doped regions.
    Type: Application
    Filed: August 31, 2020
    Publication date: December 17, 2020
    Inventors: Jyun-Hao Lin, Chun-Feng Nieh, Yu-Chang Lin, Huicheng Chang
  • Gradient doped region of recessed fin forming a FinFET device
    Patent number: 10763363
    Abstract: An embodiment is a method of manufacturing a semiconductor device. The method includes forming a fin on a substrate. A gate structure is formed over the fin. A recess is formed in the fin proximate the gate structure. A gradient doped region is formed in the fin with a p-type dopant. The gradient doped region extends from a bottom surface of the recess to a vertical depth below the recess in the fin. A source/drain region is formed in the recess and on the gradient doped regions.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: September 1, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jyun-Hao Lin, Chun-Feng Nieh, Huicheng Chang, Yu-Chang Lin
  • Gradient Doped Region of Recessed Fin Forming a FinFET Device
    Publication number: 20190312143
    Abstract: An embodiment is a method of manufacturing a semiconductor device. The method includes forming a fin on a substrate. A gate structure is formed over the fin. A recess is formed in the fin proximate the gate structure. A gradient doped region is formed in the fin with a p-type dopant. The gradient doped region extends from a bottom surface of the recess to a vertical depth below the recess in the fin. A source/drain region is formed in the recess and on the gradient doped regions.
    Type: Application
    Filed: April 10, 2018
    Publication date: October 10, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jyun-Hao LIN, Chun-Feng NIEH, Huicheng CHANG, Yu-Chang LIN