Patents by Inventor Jyun-Jie WANG

Jyun-Jie WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12130763
    Abstract: A storage enclosure connected to a server via an external network and includes a network switch, an expander that is connected to the network switch and that is configured to generate enclosure data that supports a format conforming with SCSI Enclosure Services, and a board management controller (BMC) that is connected to the network switch and the expander. The BMC is configured to translate the enclosure data into enclosure translating data that supports a Redfish® format. The expander is configured to, after generating the enclosure data, transmit the enclosure data through the network switch to the BMC via an internal network. The BMC is configured to translate the enclosure data into the enclosure translating data, and to transmit the enclosure translating data to the network switch. The network switch transmits the enclosure translating data to the server through the external network.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: October 29, 2024
    Assignee: MITAC COMPUTING TECHNOLOGY CORPORATION
    Inventors: Jyun-Jie Wang, Shao-Che Chang, Cheng-Tung Wang, Yen-Lun Tseng, Chin-Hung Tan
  • Patent number: 11966596
    Abstract: A method of power management includes steps of: in response to receiving from a server host a sleep command, an expander first outputting a predetermined register value to a processing unit in a normal state, and then switching to a power-saving state and outputting an interrupt signal to the processing unit; the processing unit determining whether both the predetermined register value and the interrupt signal are received; and when it is determined that both the predetermined register value and the interrupt signal have been received, the processing unit controlling a power supply to output standby electricity, making the expander and the processing unit operate based on the standby electricity.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: April 23, 2024
    Assignee: MITAC COMPUTING TECHNOLOGY CORPORATION
    Inventors: Jyun-Jie Wang, Yen-Lun Tseng
  • Publication number: 20230195671
    Abstract: A storage enclosure connected to a server via an external network and includes a network switch, an expander that is connected to the network switch and that is configured to generate enclosure data that supports a format conforming with SCSI Enclosure Services, and a board management controller (BMC) that is connected to the network switch and the expander. The BMC is configured to translate the enclosure data into enclosure translating data that supports a Redfish® format. The expander is configured to, after generating the enclosure data, transmit the enclosure data through the network switch to the BMC via an internal network. The BMC is configured to translate the enclosure data into the enclosure translating data, and to transmit the enclosure translating data to the network switch. The network switch transmits the enclosure translating data to the server through the external network.
    Type: Application
    Filed: December 14, 2022
    Publication date: June 22, 2023
    Inventors: Jyun-Jie WANG, Shao-Che CHANG, Cheng-Tung WANG, Yen-Lun TSENG, Chin-Hung TAN
  • Publication number: 20230102777
    Abstract: A method of power management includes steps of: in response to receiving from a server host a sleep command, an expander first outputting a predetermined register value to a processing unit in a normal state, and then switching to a power-saving state and outputting an interrupt signal to the processing unit; the processing unit determining whether both the predetermined register value and the interrupt signal are received; and when it is determined that both the predetermined register value and the interrupt signal have been received, the processing unit controlling a power supply to output standby electricity, making the expander and the processing unit operate based on the standby electricity.
    Type: Application
    Filed: September 22, 2022
    Publication date: March 30, 2023
    Inventors: Jyun-Jie WANG, Yen-Lun TSENG
  • Patent number: 11513697
    Abstract: A control system for a storage apparatus includes two input/output modules (IOMs), and two non-volatile memory (NVM) devices that are electrically connected to the IOMs, respectively, and that each store a firmware code. Each of the IOMs is configured to execute a firmware corresponding to the firmware code stored in the corresponding NVM device, and to enter an active mode or a passive mode after executing the firmware. The IOMs are configured such that when one IOM operating in the passive mode detects abnormal operation of the other IOM operating in the active mode, the one IOM sends, to the other IOM, the firmware code stored in the NVM device electrically connected to the one IOM, in order to update the firmware code in the NVM device electrically connected to the other IOM.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: November 29, 2022
    Assignee: MITAC COMPUTING TECHNOLOGY CORPORATION
    Inventors: Jyun-Jie Wang, Cheng-Tung Wang, Yen-Lun Tseng
  • Publication number: 20220075533
    Abstract: A control system for a storage apparatus includes two input/output modules (IOMs), and two non-volatile memory (NVM) devices that are electrically connected to the IOMs, respectively, and that each store a firmware code. Each of the IOMs is configured to execute a firmware corresponding to the firmware code stored in the corresponding NVM device, and to enter an active mode or a passive mode after executing the firmware. The IOMs are configured such that when one IOM operating in the passive mode detects abnormal operation of the other IOM operating in the active mode, the one IOM sends, to the other IOM, the firmware code stored in the NVM device electrically connected to the one IOM, in order to update the firmware code in the NVM device electrically connected to the other IOM.
    Type: Application
    Filed: September 3, 2021
    Publication date: March 10, 2022
    Inventors: Jyun-Jie WANG, Cheng-Tung WANG, Yen-Lun TSENG
  • Patent number: 10942555
    Abstract: A power supplying method for a computer system is proposed. The computer system includes a first computer node, a first power supply unit corresponding to the first computer node, a second computer node, a second power supply unit corresponding to the second computer node, and a connection module electrically connected to the computer nodes and the power supply units. The power supplying method includes: detecting, by the first computer node, whether the second power supply unit operates abnormally; and upon detecting at least that the second power supply unit operates abnormally, controlling, by the first computer node, the first power supply unit to provide electric power to the second computer node through the connection module.
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: March 9, 2021
    Assignee: Mitac Computing Technology Corporation
    Inventors: Ming-Li Tsai, Jyun-Jie Wang, Cheng-Tung Wang, Chia-Ming Liu, Ming-Hsuan Tsai
  • Patent number: 10684664
    Abstract: A test and diagnostics circuit, methods and systems are described. An example test and diagnostics circuit includes a controller and a power monitor coupled to the controller. A load switch on the test and diagnostics circuit selectably implements a load from among multiple load values to test a computing and/or data storage system. The test and diagnostics circuit includes circuitry connecting the controller, the power monitor and the load switch to receive a test enable signal from a non-dedicated pin in a non-volatile dual inline memory module (NV-DIMM) slot to implement a test operation on the system.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: June 16, 2020
    Assignee: Hewlett Packard Enterprise Develepment LP
    Inventors: Raghavan V. Venugopal, Patrick A. Raymond, William C. Hallowell, Han Wang, Chin-Lung Chiang, Jyun-Jie Wang
  • Publication number: 20190121413
    Abstract: A power supplying method for a computer system is proposed. The computer system includes a first computer node, a first power supply unit corresponding to the first computer node, a second computer node, a second power supply unit corresponding to the second computer node, and a connection module electrically connected to the computer nodes and the power supply units. The power supplying method includes: detecting, by the first computer node, whether the second power supply unit operates abnormally; and upon detecting at least that the second power supply unit operates abnormally, controlling, by the first computer node, the first power supply unit to provide electric power to the second computer node through the connection module.
    Type: Application
    Filed: October 18, 2018
    Publication date: April 25, 2019
    Inventors: Ming-Li TSAI, Jyun-Jie WANG, Cheng-Tung WANG, Chia-Ming LIU, Ming-Hsuan TSAI
  • Patent number: 10193251
    Abstract: A Next Generation Form Factor (NGFF) carrier includes a flat component perpendicularly connected to two flat side components to receive an NGFF module, a bar rotatably connected to the two flat side components, and a number of holds along an interior of the flat component to receive a fastener. The NGFF module is insertable in relation to the flat component when the bar is rotated to a first position and fixed on the flat component when the bar is rotated to a second position.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: January 29, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Chin-Lung Chiang, Jyun-Jie Wang, Andrew Potter, Raghavan V Venugopal
  • Patent number: 9966678
    Abstract: A Next Generation Form Factor (NGFF) connector apparatus can include a plurality of upper signal pins and an upper ground (GND) pin that is longer than other upper pins. The NGFF connector apparatus can also include a plurality of lower signal pins and a lower power (PWR) pin that is longer than other lower pins.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: May 8, 2018
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Chin-Lung Chiang, Jyun-Jie Wang, Meng-Chen Wu, Raghavan V Venugopal, Patrick Raymond, Andrew Potter
  • Publication number: 20170214159
    Abstract: A Next Generation Form Factor (NGFF) carrier includes a flat component perpendicularly connected to two flat side components to receive an NGFF module, a bar rotatably connected to the two flat side components, and a number of holds along an interior of the flat component to receive a fastener. The NGFF module is insertable in relation to the flat component when the bar is rotated to a first position and fixed on the flat component when the bar is rotated to a second position.
    Type: Application
    Filed: July 31, 2014
    Publication date: July 27, 2017
    Inventors: Chin-Lung CHIANG, Jyun-Jie WANG, Andrew POTTER, Raghavan V VENUGOPAL
  • Publication number: 20170214162
    Abstract: A Next Generation Form Factor (NGFF) connector apparatus can include a plurality of upper signal pins and an upper ground (GND) pin that is longer than other upper pins. The NGFF connector apparatus can also include a plurality of lower signal pins and a lower power (PWR) pin that is longer than other lower pins.
    Type: Application
    Filed: July 31, 2014
    Publication date: July 27, 2017
    Inventors: Chin-Lung CHIANG, Jyun-Jie WANG, Meng-Chen WU, Raghavan V VENUGOPAL, Patrick RAYMOND, Andrew POTTER
  • Publication number: 20170185123
    Abstract: A test and diagnostics circuit, methods and systems are described. An example test and diagnostics circuit includes a controller and a power monitor coupled to the controller. A load switch on the test and diagnostics circuit selectably implements a load from among multiple load values to test a computing and/or data storage system. The test and diagnostics circuit includes circuitry connecting the controller, the power monitor and the load switch to receive a test enable signal from a non-dedicated pin in a non-volatile dual inline memory module (NV-DIMM) slot to implement a test operation on the system.
    Type: Application
    Filed: July 31, 2014
    Publication date: June 29, 2017
    Inventors: Raghavan V. VENUGOPAL, Patrick A. RAYMOND, William C. HALLOWELL, Han WANG, Chin-Lung CHIANG, Jyun-Jie WANG