Patents by Inventor Jyun-Yu Chen

Jyun-Yu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170257868
    Abstract: A method of joint clustering and precoding and a base station using the same are provided and applicable to a non-orthogonal multiple access (NOMA) system. The method includes: dividing four user equipments into a first cluster and a second cluster each consisting of two user equipments; forming a first cluster signal and a second cluster signal for simultaneous transmission at the base station; establishing a first precoding set and a second precoding set for the first cluster and the second cluster, respectively, by using channel state information between the base station and all the user equipments; selecting a first precoder from the first precoding set and a second precoder from the second precoding set; superposing the first cluster signal multiplied by the first precoder and the second cluster signal multiplied by the second precoder and broadcasting a resulting signal to the user equipments in the first and second cluster.
    Type: Application
    Filed: July 20, 2016
    Publication date: September 7, 2017
    Inventors: Chin-Liang Wang, Jyun-Yu Chen, Siu-Hang Lam
  • Patent number: 9754976
    Abstract: An element substrate is provided, including a substrate, a metal layer, a planarization layer and a first conductive layer. The metal layer is disposed on the substrate. The planarization layer is located on the metal layer, wherein the planarization layer includes a contact hole, the contact hole has a continuous wall and a bottom, the bottom exposes the metal layer, and the bottom of the contact hole has a first width. The first conductive layer is located on the planarization layer, wherein the first conductive layer includes an opening, the opening exposes the contact hole, and the opening has a second width above the contact hole, wherein the relationship of the first width and the second width is modified to decrease illumination loss and to prevent problems of shot-circuiting and insufficient capacitance.
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: September 5, 2017
    Assignee: INNOLUX CORPORATION
    Inventors: Yueh-Ting Chung, Shao-Wu Hsu, Yung-Hsin Lu, Jyun-Yu Chen, Kuan-Yu Chiu, Chao-Hsiang Wang
  • Patent number: 9658504
    Abstract: A display panel comprising a substrate, a plurality of gate lines, source lines, semiconductor layers and light shielding layers is provided. The gate lines are disposed on the substrate in parallel. The source lines are disposed on the substrate in parallel. The gate lines and the source lines are intercrossed to define a plurality of pixel areas. The semiconductor layers are disposed on the corresponding pixel areas, and each semiconductor layer includes at least one channel region overlapping each gate line. The slight shielding layers are located between the channel regions and the substrate. In a normal direction of the substrate, one of the gate lines is overlapped by two of the light shielding layers, and one of the light shielding layers overlaps even number of the source lines.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: May 23, 2017
    Assignee: INNOLUX CORPORATION
    Inventors: Yung-Hsin Lu, Cheng-Min Wu, Ming-Yo Chiang, Jyun-Yu Chen
  • Patent number: 9543335
    Abstract: An element substrate is provided, including a substrate, a metal layer and a planarization layer. The metal layer is located on the substrate. The metal layer has a first edge in a first direction. The planarization layer is located on the metal layer. The planarization layer includes a contact hole. The contact hole has a contiguous wall and a bottom side. The metal layer is exposed in the bottom side. A contour line of the contiguous wall on a vertical plane is a curved line. The first edge corresponds vertically with a critical point on the contour line. The slope of a tangent line on the critical point of the contour line is between 0.087 to 0.364.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: January 10, 2017
    Assignee: INNOLUX CORPORATION
    Inventors: Yueh-Ting Chung, Jyun-Yu Chen, Wei-Chen Hsu, Yung-Hsin Lu, Chao-Hsiang Wang, Kuan-Yu Chiu
  • Patent number: 9360725
    Abstract: An element substrate is provided, including a substrate, a metal layer and a planarization layer. The metal layer is located on the substrate. The metal layer has a first edge in a first direction. The planarization layer is located on the metal layer. The planarization layer includes a contact hole. The contact hole has a contiguous wall and a bottom side. The metal layer is exposed in the bottom side. A contour line of the contiguous wall on a vertical plane is a curved line. The first edge corresponds vertically with a critical point on the contour line. The slope of a tangent line on the critical point of the contour line is smaller than 0.176.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: June 7, 2016
    Assignee: INNOLUX CORPORATION
    Inventors: Yueh-Ting Chung, Jyun-Yu Chen, Wei-Chen Hsu, Yung-Hsin Lu, Chao Hsiang Wang, Kuan Yu Chiu
  • Publication number: 20160139452
    Abstract: An element substrate is provided, including a substrate, a metal layer and a planarization layer. The metal layer is located on the substrate. The metal layer has a first edge in a first direction. The planarization layer is located on the metal layer. The planarization layer includes a contact hole. The contact hole has a contiguous wall and a bottom side. The metal layer is exposed in the bottom side. A contour line of the contiguous wall on a vertical plane is a curved line. The first edge corresponds vertically with a critical point on the contour line. The slope of a tangent line on the critical point of the contour line is between 0.087 to 0.364.
    Type: Application
    Filed: January 21, 2016
    Publication date: May 19, 2016
    Inventors: Yueh-Ting CHUNG, Jyun-Yu CHEN, Wei-Chen HSU, Yung-Hsin LU, Chao-Hsiang WANG, Kuan-Yu CHIU
  • Publication number: 20160098118
    Abstract: The present invention is related to a capacitive touch device and excitation signal generating circuit and method thereof. The excitation signal generating circuit is connected to multiple sensing traces of the capacitive touch device, and has a storage unit storing at least one set of digital data. Each set of digital data is corresponding to a frequency. The PDM signal generator reads the set of digital data and converts the read set of digital data to a PDM signal according to the frequency of the read set of digital data. The PDM signal is recovered to an analog excitation signal since the PDM signal passes through a current transmission path, which is equivalent to a low pass filter. Therefore, the present invention can decrease a distortion of the sensing signal to increase accuracy of the sensing signal and to save power.
    Type: Application
    Filed: August 13, 2015
    Publication date: April 7, 2016
    Applicant: ELAN MICROELECTRONICS CORPORATION
    Inventors: Chia-Hsing Lin, Han-Wei Chen, Jyun-Yu Chen
  • Publication number: 20160079279
    Abstract: An element substrate is provided, including a substrate, a metal layer, a planarization layer and a first conductive layer. The metal layer is disposed on the substrate. The planarization layer is located on the metal layer, wherein the planarization layer includes a contact hole, the contact hole has a continuous wall and a bottom, the bottom exposes the metal layer, and the bottom of the contact hole has a first width. The first conductive layer is located on the planarization layer, wherein the first conductive layer includes an opening, the opening exposes the contact hole, and the opening has a second width above the contact hole, wherein the relationship of the first width and the second width is modified to decrease illumination loss and to prevent problems of shot-circuiting and insufficient capacitance.
    Type: Application
    Filed: November 4, 2014
    Publication date: March 17, 2016
    Inventors: Yueh-Ting CHUNG, Shao-Wu HSU, Yung-Hsin LU, Jyun-Yu CHEN, Kuan-Yu CHIU, Chao-Hsiang WANG
  • Publication number: 20160018687
    Abstract: An element substrate is provided, including a substrate, a metal layer and a planarization layer. The metal layer is located on the substrate. The metal layer has a first edge in a first direction. The planarization layer is located on the metal layer. The planarization layer includes a contact hole. The contact hole has a contiguous wall and a bottom side. The metal layer is exposed in the bottom side. A contour line of the contiguous wall on a vertical plane is a curved line. The first edge corresponds vertically with a critical point on the contour line. The slope of a tangent line on the critical point of the contour line is smaller than 0.176.
    Type: Application
    Filed: September 22, 2014
    Publication date: January 21, 2016
    Inventors: Yueh-Ting CHUNG, Jyun-Yu CHEN, Shao Wu HSU, Yung-Hsin LU, Chao Hsiang WANG, Kuan Yu CHIU
  • Publication number: 20160004347
    Abstract: A touch sensing apparatus includes an excitation source, a capacitor under test, a sampling circuit and a filter. The excitation source is used to generate an excitation signal having a first frequency. The capacitor under test is used to receive the excitation signal, and generate a sensing signal. The sampling circuit is used to sample the sensing signal to generate a digital output. The sampling circuit includes a pulse density modulation unit operating at a second frequency to generate the digital output, wherein the second frequency is higher than the first frequency. The filter is coupled to the pulse density modulation unit, and arranged to filter the digital output.
    Type: Application
    Filed: April 16, 2015
    Publication date: January 7, 2016
    Inventors: Chia-Hsing Lin, Han-Wei Chen, Jyun-Yu Chen
  • Publication number: 20150205176
    Abstract: A display panel comprising a substrate, a plurality of gate lines, source lines, semiconductor layers and light shielding layers is provided. The gate lines are disposed on the substrate in parallel. The source lines are disposed on the substrate in parallel. The gate lines and the source lines are intercrossed to define a plurality of pixel areas. The semiconductor layers are disposed on the corresponding pixel areas, and each semiconductor layer includes at least one channel region overlapping each gate line. The slight shielding layers are located between the channel regions and the substrate. In a normal direction of the substrate, one of the gate lines is overlapped by two of the light shielding layers, and one of the light shielding layers overlaps even number of the source lines.
    Type: Application
    Filed: January 16, 2015
    Publication date: July 23, 2015
    Applicant: Innolux Corporation
    Inventors: Yung-Hsin LU, Cheng-Min WU, Ming-Yo CHIANG, Jyun-Yu CHEN
  • Publication number: 20150206907
    Abstract: A thin film transistor substrate is provided. The TFT substrate comprises a substrate, a first metal layer, a first insulating layer, a channel layer, a second insulating layer and a gate layer. The first metal layer is disposed on the substrate, and comprises a first portion and a second portion which are separated from each other. The first insulating layer is disposed on the first metal layer. The channel layer is disposed on the first insulating layer. The second insulating layer is disposed on the channel layer. The gate layer is disposed on the second insulating layer. The first portion and the second portion of the first metal layer partially overlap the channel layer.
    Type: Application
    Filed: January 14, 2015
    Publication date: July 23, 2015
    Applicant: INNOLUX CORPORATION
    Inventors: Shao-Wu HSU, Yung-Hsin LU, Jyun-Yu CHEN
  • Patent number: 8331260
    Abstract: A symbol detection method for an MIMO system based on path finding, which is a novel nonlinear signal detection algorithm called the MACO (Modified Ant Colony Optimization) algorithm in the present invention. The MACO algorithm is improved from the conventional ant colony optimization algorithm and applied to an MIMO (Multiple-Input Multiple-Output) system. The MIMO system increases the utility efficiency of spectrum but computational complexity of signal detection in the receiving terminals is suffered. The present invention simulates the foraging behavior of ants and pheromone to achieve superior performance and low computational complexity in signal detection of an MIMO system.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: December 11, 2012
    Assignee: National Yunlin University of Science and Technology
    Inventors: Jenn-Kaie Lain, Jyun-Yu Chen, Po-Hui Yang
  • Publication number: 20120069769
    Abstract: A symbol detection method for an MIMO system based on path finding, which is a novel nonlinear signal detection algorithm called the MACO (Modified Ant Colony Optimization) algorithm in the present invention. The MACO algorithm is improved from the conventional ant colony optimization algorithm and applied to an MIMO (Multiple-Input Multiple-Output) system. The MIMO system increases the utility efficiency of spectrum but computational complexity of signal detection in the receiving terminals is suffered. The present invention simulates the foraging behavior of ants and pheromone to achieve superior performance and low computational complexity in signal detection of an MIMO system.
    Type: Application
    Filed: September 16, 2010
    Publication date: March 22, 2012
    Inventors: Jenn-Kaie LAIN, Jyun-Yu Chen, Po-Hui Yang
  • Patent number: 7386403
    Abstract: A method and a system for charging management are applied in an electronic device. The system includes a sensing unit, a detecting unit, a signal output unit, a receiving unit and a processing unit. By the method, when the sensing unit senses an external power source inputted to the electronic device, the detecting unit detects a current electric quantity of a battery of the electronic device. The processing unit actuates the signal output unit to provide an operating interface for a user to issue a command through a hot key or an application program selection control window. After the receiving unit receives the command from the user, a required charging mode is activated according to the user's requirement. Therefore, problems resulted from battery removal such as inconvenience and failure of an uninterruptable power mechanism are solved, and a battery charging frequency is reduced to prolong the battery lifetime.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: June 10, 2008
    Assignee: Inventec Corporation
    Inventors: Jyun-Yu Chen, Hua-Hung Chen
  • Publication number: 20060229832
    Abstract: A method and a system for charging management are applied in an electronic device. The system includes a sensing unit, a detecting unit, a signal output unit, a receiving unit and a processing unit. By the method, when the sensing unit senses an external power source inputted to the electronic device, the detecting unit detects a current electric quantity of a battery of the electronic device. The processing unit actuates the signal output unit to provide an operating interface for a user to issue a command through a hot key or an application program selection control window. After the receiving unit receives the command from the user, a required charging mode is activated according to the user's requirement. Therefore, problems resulted from battery removal such as inconvenience and failure of an uninterruptable power mechanism are solved, and a battery charging frequency is reduced to prolong the battery lifetime.
    Type: Application
    Filed: March 30, 2005
    Publication date: October 12, 2006
    Inventors: Jyun-Yu Chen, Hua-Hung Chen