Patents by Inventor K. C. Lai

K. C. Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6143884
    Abstract: A manufacturing process of cellulose solution with low viscosity includes the step of dissolving a cellulose in a mixture solvent which is produced by mixing an additional solvent mixture, N-methylol caprolactom, with a main solvent, N-methyl morpholine oxide. The present invention not only can increase the swelling of the pulp during the dissolving process, but also can lower the viscosity of the cellulose solution that enables the manufacturing process to process at lower temperature and the cellulose solution produced to spin in higher spinning speed. Therefore, the physical property and the quality of the final fiber product are improved by eliminating the problem of cellulose polymerization decay.
    Type: Grant
    Filed: May 9, 1998
    Date of Patent: November 7, 2000
    Assignee: Acelon Chemicals & Fiber Corporation
    Inventors: Meng-Song Cheng, S. P. Chen, K. C. Lai
  • Patent number: 5210047
    Abstract: A process for fabricating an electrically programmable read-only memory array having increased density includes forming recessed field oxide regions in a silicon substrate. Elongated parallel wordline stacks are then formed over the surface of the substrate. Source and drain regions are formed by ion implantation in the openings between these vertical stacks. These openings are then filled with a metal layer until the wafer is substantially planar. This metal layer is then patterned to form drain contact pads and V.sub.SS interconnect strips. The V.sub.SS interconnect strips contact adjacent source regions across field oxide regions that insulate adjacent memory cells.
    Type: Grant
    Filed: December 12, 1991
    Date of Patent: May 11, 1993
    Inventors: Been-Jon K. Woo, Gregory Atwood, Stefan K. C. Lai, T. C. Ong
  • Patent number: 4957877
    Abstract: Improved processing which permits the simultaneous fabrication of block erasable flash EPROM cells and individually erasable EEPROM cells. A polysilicon finger extends from the floating gate of the EEPROM cell over a tunnel oxide region. Doped regions are formed under this finger by implanting dopants in alignment with the finger during the implantation of the source and drain regions for the cells and then driving the dopant under the finger. The arsenic dopant used to form the source and drain regions for the cells is used to form the doped regions along with the phosphorus dopant used for the source region of the flash EPROM cells.
    Type: Grant
    Filed: November 21, 1988
    Date of Patent: September 18, 1990
    Assignee: Intel Corporation
    Inventors: Simon M. Tam, Stefan K. C. Lai