Abstract: The present invention detects defects near the gate/trench-surface interface of trench transistors. Defects near this interface which cause long term reliability problems generally also result in charges being trapped near the interface. In accordance with one embodiment of the present invention, a negative voltage is applied to the gate of the trench transistor with its drain grounded and its source floating. A leakage current flowing between the gate and drain is measured as a function of the voltage applied to the gate. A transistor whose gate-drain leakage current exceeds a predetermined value at a specified gate voltage is deemed to be defective. In another embodiment of the present invention, the gate-drain leakage current is measured as described above and monitored over time. Charge accumulated near the gate-drain interface due to defects in the interface results in the gate-drain leakage current taking a longer period of time to fall off to its steady state value.

Abstract: The present invention relates to a novel process for preparing sulfonylurea derivatives of formula (I) in a high purity and a high yield characterized in that a sulfonylchloride of formula (V) is reacted with 2-amino-4,6-dimethoxypyrimidine of formula (VII) in the presence of a metal cyanate and an organic base catalyst or a compound of formula (VIII) is reacted with 2-amino-4,6-dimethoxypyrimidine of formula (VII): ##STR1## wherein R.sup.1 represents hydrogen, C.sub.1 -C.sub.4 alkyl or phenyl, R.sup.2 represents hydrogen, C.sub.1 -C.sub.4 alkyl, allyl or propargyl and R.sup.3 represents hydrogen, methyl, ethyl or phenyl, and to a process for preparing the sulfonylchloride compound of formula (V) above and the compound of formula (VIII) above, both of which are useful as an intermediate compound for preparing the sulfonylurea derivative of formula (I) and to a novel intermediate compound of formula (VIII) as defined above.

Abstract: The present invention relates to a process for preparation of 5-pyrazolemercaptan derivatives represented by the following general formula (I), which is useful for synthesis of sulfonylurea-based herbicides, and an intermediate thereof, ##STR1## wherein R.sup.1 represents hydrogen, C.sub.1 -C.sub.4 alkyl, allyl or propargyl,R.sup.2 represents hydrogen, C.sub.1 -C.sub.4 alkyl, or a phenyl group which can contain one or more substituent selected from the group consisting of halogen, nitro and methyl at an optional position, andR.sup.3 represents hydrogen, methyl, ethyl or phenyl.

Abstract: The object of the present invention is to prevent the electrical short between the adjacent metal wires by forming metal wires alternately between insulation films and to improve the process margin in the lithography process and the etching process.The present invention alternately forms a plurality of metal wires between the insulation films by manufacturing the photomask for metal wires in two separate pieces to correspond to the photomask for general metal wires for forming a plurality of metal wires which are densely constituted, and by utilizing the two photomasks.

Abstract: The present invention relates to a process for preparation of 5-pyrazolemercaptan derivatives represented by the following general formula (I), which is useful for synthesis of sulfonylurea-based herbicides, and an intermediate thereof, ##STR1## wherein R.sup.1 represents hydrogen, C.sub.1 -C.sub.4 alkyl, allyl or propargyl,R.sup.2 represents hydrogen, C.sub.1 -C.sub.4 alkyl, or a phenyl group which can contain one or more substituent selected from the group consisting of halogen, nitro and methyl at an optional position, andR.sup.3 represents hydrogen, methyl, ethyl or phenyl.

Abstract: A method for forming a metal wiring of a semiconductor device, capable of avoiding a complexity of procedural steps involved in the formation of a metal plug buried in deeper contact holes having different depths in the formation of the metal wiring buried in the contact holes.

Abstract: A method for fabricating a contact plug capable of achieving a smooth tungsten growth by implanting silicon ions in the bottom surface of a via contact hole not only to remove a polymer formed on the bottom surface of the via contact hole, but also to provide a seed layer for the tungsten growth, and capable of preventing an adverse effect on the contact resistance resulting from a formation of AlF.sub.3 due to a direct contact between Al and WF.sub.6.

Abstract: An ATM multiplexing system comprising a plurality of ATM cell input circuits, each of which stores a cell stream incoming from a corresponding input stage and absorbs and removes instantaneous displacement of the incoming cells, a priority encoder for receiving simultaneously FIFO storage level information from the ATM cell input circuits and determining a priority for processing first an input stage with the largest number of stored cells, the FIFO storage level information including the number of the cells stored in the ATM cell input circuits, a link table processing circuit for receiving output headers from the priority encoder and input port numbers corresponding to the received headers and outputting changed headers corresponding to the received headers, an ATM cell output circuit for receiving the changed headers and link information from the link table processing circuit, determining a cell transmission order according to a service priority and performing a header assembling function for perfect cell

Abstract: Disclosed is a head structure for accomplishing a wireless structure of a video cassette recorder and for improving its assembling work. The head has a body for supporting a head portion for recording, erasing and/or reproducing data on a tape. A pair of neck portions are separately formed on a lower portion of the body for being necked in a through hole of a base in the video cassette recorder. A pair of head terminals are protrudingly and downwardly formed on a lower surface of the body, between the neck portions and a socket having a pair of socket grooves for receiving the head terminals and a pair of socket terminals on a lower surface thereof are provided. The socket is mounted on a wafer having a pair of grooves for receiving the socket terminals, the wafer being fixed on a printed circuit board of the video cassette recorder.

Abstract: A surface mount semiconductor package having a novel lead configuration which facilitates a higher packing density than presently available semiconductor packages. More particularly, the package includes a plurality of electrical leads each having a laterally outwardly extending portion, a downwardly extending portion depending from an inner distal end of the laterally extending portion, and a foot portion extending laterally inwardly from a lower distal end of the downwardly extending portion. A semiconductor chip is mounted, preferably by adhesive means such as insulating tape, to the foot portion of the leads. A plurality of electrical wires are connected between an upper surface of the chip and the laterally outwardly extending portion of respective ones of the leads. A protective body, such as a molded resin body, encapsulates the chip, the wires, the laterally outwardly and downwardly extending portions of the leads.

Abstract: A process for fabricating a metal plug having a uniform surface capable of preventing a junction consumption reaction.

Abstract: An improved electronic design automation (EDA) system employs field programmable gate arrays (FPGAs) for emulating prototype circuit designs. A circuit netlist file is down-loaded to the FPGAs to configure the FPGAs to emulate a functional representation of the prototype circuit. To check whether the circuit netlist is implemented properly, the FPGAs are tested functionally by applying input vectors thereto and comparing the resulting output of the FPGAs to output vectors provided from prior simulation. If the FPGAs fail such vector comparison, the FPGAs are debugged by inserting "read-back" trigger instructions in the input vectors, preferably corresponding to fail points in the applied vector stream. Modifying the input vectors with such read-back signals causes the internal states of latches and flip-flops in each FPGA to be captured when functional testing is repeated.

Abstract: The present invention relates to a process for preparation of 5-pyrazolemercaptan derivatives represented by the following general formula (I), which is useful for synthesis of sulfonylurea-based herbicides, and an intermediate thereof, ##STR1## wherein R.sup.1 represents hydrogen, C.sub.1 -C.sub.4 alkyl, allyl or propargyl,R.sup.2 represents hydrogen, C.sub.1 -C.sub.4 alkyl, or a phenyl group which can contain one or more substituent selected from the group consisting of halogen, nitro and methyl at an optional position, andR.sup.3 represents hydrogen, methyl, ethyl or phenyl.

Abstract: A method of forming a via plug in a semiconductor device is disclosed. Metal nuclei are formed on the surface of the metal layer underlying the via hole. The metal layer, which is partially exposed between metal nuclei, is etched by means of a wet etching method, and accordingly, a plurality of etching grooves is formed on the partially exposed surface of the metal layer. As a result, the formation of such grooves has the effect of increasing the bottom surface area of the via hall, thereby increasing the adhesive strength to a contact surface of the via hall and decreasing the via resistance.

Abstract: A novel E. coli strain which can produce L-phenylalanine and is resistant to high osmotic pressure and a process for producing L-phenylalanine by use of the novel E. coli (KCCM 10,016) are disclosed.

Abstract: The present invention relates to a process for preparation of 5-pyrazolemercaptan derivatives represented by the following general formula (I), which is useful for synthesis of sulfonyl-urea-based herbicides, and an intermediate thereof, ##STR1## wherein R.sup.1 represents hydrogen, C.sub.1 -C.sub.4 alkyl, allyl or propargyl,R.sup.2 represents hydrogen, C.sub.1 -C.sub.4 alkyl, or a phenyl group which can contain one or more substituent selected from the group consisting of halogen, nitro and methyl at an optional position, andR.sup.3 represents hydrogen, methyl, ethyl or phenyl.

Abstract: The present invention provides a method for forming a metal contact in a semiconductor device which improves the reliability of electric wiring by forming a double thin metal layer on the contact plug metal. This method comprises the steps of: forming a first contact hole up to the upper surface of a semiconductor substrate 1; filling a tungsten 5 in the first contact hole; depositing a first thin metal film 6 and a second thin metal film 7 on the entire structure sequentially; applying a photoresist 8 on the second thin metal film 7; forming a pattern for a second contact hole; forming the second contact hole by etching the second thin metal film 7, the first thin metal film 6 and the insulation layer 4 sequentially by using a photoresist 8 as an etch barrier; stripping the photoresist 8 and etching the second thin metal film 7; and depositing an aluminum alloy 9 on the entire structure.

Abstract: A process for producing a thin film transistor suitable to a high integrated static ram (SRAM) or a liquid crystal display, thereby improvements in a leak current and an operating current along with a process for the production of a thin film transistor.The process comprises a step of forming a SOG film in a predetermined thickness on the entire upper surface of a TFT structure and subsequently treating the SOG film with O.sub.2 plasma to increase the hydrogen content therein, a step of depositing an insulating film on the SOG film to prevent the hydrogen of SOG film from escaping therefrom and thereafter, applying heat treatment to the SOG film to infiltrating the hydrogen of the SOG film into a channel formed in a polysilicon layer in the TFT structure, and a step of removing the insulating film and the SOG film.There may be reduced a leak current when switching off the TFT as well as increased an operating current when switching on the TFT.