Abstract: A computing system includes a memory bus, an input/output bus, a main memory, and an input/output adapter. The memory bus provides information transfer. The input/output bus also provides information transfer. For example the input/output bus is an input/output bus onto which is connected input/output devices. The main memory is connected to the memory bus. The main memory includes a page directory. The page directory stores translations. Each translation in the page directory includes a portion of an address for data transferred over the input/output bus, for example, the page address portion of I/O bus address. Each translation in the page directory also is indexed by a portion of an address for a memory location within the main memory, for example, the page address portion of the address for the memory location. The input/output adapter is connected to the memory bus and the input/output bus. The input/output adapter includes an input/output translation look-aside buffer.

Abstract: A computing system includes a main memory and an input/output adapter. The input/output adapter accesses a translation map. The translation map maps input/output page numbers to memory address page numbers. Entries to the translation map are generated so that each entry includes an address of a data page in the main memory and transaction configuration information. The transaction configuration information is utilized by the input/output adapter during data transactions to and from the data page.

Abstract: A method and apparatus are presented for an improved data transferring technique between a network and a computing system. A network adapter implements a data transfer from a network to the memory of a destination computing system, accumulating a checksum of all data transferred. The dedicated hardware allows data to be transferred through it and a checksum to be accumulated without intervention by the processor of the destination computing system. Software corrections can generate a checksum of the header data and then generate a net checksum by subtracting the header checksum from the gross checksum accumulated by the dedicated hardware, thus achieving the desired result with minimal intervention by the processor of the destination computing system.

Abstract: A computing system includes a memory bus, a main memory, an I/O adapter and a processor. The main memory, the I/O adapter and the processor are connected to the bus. The I/O adapter includes a translation map. The translation map maps I/O page numbers to memory address page numbers. The translation map includes coherence indices. The processor includes a cache and an instruction execution means. The instruction execution means generates coherence indices to be stored in the translation map. The instruction execution means performs in hardware a hash operation to generate the coherence indices.