Patents by Inventor K. Naresh Chandra Srinivas

K. Naresh Chandra Srinivas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dual numerically controlled delay logic for DQS gating
    Patent number: 7299306
    Abstract: Presented herein is a scheme for reducing the likelihood of erroneous DQS signals. Logic is incorporated proximate to a memory controller and receives a signal indicating a read request and a DQS signal from a memory module. The logic transmits a signal indicating the presence of data, based on the timing relationship between the DQS signals and signal indicating read requests.
    Type: Grant
    Filed: June 20, 2003
    Date of Patent: November 20, 2007
    Assignee: Broadcom Corporation
    Inventors: K. Naresh Chandra Srinivas, Anand Pande, Ramanujan K. Valmiki
  • Dual numerically controlled delay logic for DQS gating
    Publication number: 20040260865
    Abstract: Presented herein is a scheme for reducing the likelihood of erroneous DQS signals. Logic is incorporated proximate to a memory controller and receives a signal indicating a read request and a DQS signal from a memory module. The logic transmits a signal indicating the presence of data, based on the timing relationship between the DQS signals and signal indicating read requests.
    Type: Application
    Filed: June 20, 2003
    Publication date: December 23, 2004
    Inventors: K. Naresh Chandra Srinivas, Anand Pande, Ramanujan K. Valmiki
  • System and apparatus for scanning integrated circuits with numerically controlled delay lines
    Publication number: 20040098647
    Abstract: A system and method for scan testing an NCDL and latches controlled by the NCDL is presented herein. Wherein the NCDL is controlled by control logic, a switch is used to control the latches by a clock signal that is not controlled by the control logic. A controllability circuit provides test vectors to, and controls, the NCDL. The outputs of the NCDL are observed by an observability circuit that captures the outputs of the NCDL.
    Type: Application
    Filed: April 22, 2003
    Publication date: May 20, 2004
    Inventors: Anand Pande, S. M. Ali, K. Naresh Chandra Srinivas, Ravindra Bindus, Ramanujan K. Valmiki