Patents by Inventor K. S. Ravindhran

K. S. Ravindhran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8039961
    Abstract: One embodiment involves an article of manufacture that includes: a copper substrate plug with a front surface and a back surface; a catalyst on top of a single surface of the copper substrate plug; and a thermal interface material on top of the single surface of the copper substrate plug. The thermal interface material comprises: a layer of carbon nanotubes that contacts the catalyst, and a filler material located between the carbon nanotubes. The carbon nanotubes are oriented substantially perpendicular to the single surface of the copper substrate plug. The copper substrate plug is configured to be incorporated in a peripheral structure of a heat spreader or a heat sink. In another embodiment, the thermal interface material is on top of both the top and bottom surfaces of the copper substrate plug.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: October 18, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ephraim Suhir, Roger L. Kroeze, Peter Schwartz, K. S. Ravindhran
  • Publication number: 20090008779
    Abstract: One embodiment involves an article of manufacture that includes: a copper substrate plug with a front surface and a back surface; a catalyst on top of a single surface of the copper substrate plug; and a thermal interface material on top of the single surface of the copper substrate plug. The thermal interface material comprises: a layer of carbon nanotubes that contacts the catalyst, and a filler material located between the carbon nanotubes. The carbon nanotubes are oriented substantially perpendicular to the single surface of the copper substrate plug. The copper substrate plug is configured to be incorporated in a peripheral structure of a heat spreader or a heat sink. In another embodiment, the thermal interface material is on top of both the top and bottom surfaces of the copper substrate plug.
    Type: Application
    Filed: March 28, 2008
    Publication date: January 8, 2009
    Inventors: Ephraim Suhir, Roger L. Kroeze, Peter Schwartz, K. S. Ravindhran
  • Patent number: 5395773
    Abstract: After gates are patterned in a submicron CMOS process, a halo implant is performed with sufficient energy that the halo implant penetrates the gate structures to below the transistor channel regions. Where the substrate is not masked by gate materal, the halo implant penetrates below drain and source regions. During diffusion, this halo limits lateral diffusion of the source/drain dopants. The resulting transistor exhibits enhanced breakdown voltage characteristics during both on and off conditions.
    Type: Grant
    Filed: March 31, 1994
    Date of Patent: March 7, 1995
    Assignee: VLSI Technology, Inc.
    Inventors: K. S. Ravindhran, Yu P. Han, Ravi Jhota, Walter D. Parmantie