Patents by Inventor Kabirkumar Mirpuri

Kabirkumar Mirpuri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10008419
    Abstract: A superposed wafer is separated to a processing target wafer and a supporting wafer while being heated. Then, an adhesive on a joint surface of the processing target wafer is removed by supplying an organic solvent onto the joint surface of the processing target wafer. Then, an oxide film formed on the predetermined pattern on the joint surface of the processing target wafer is removed by supplying acetic acid to the joint surface of the processing target wafer. Then, the joint surface of the processing target wafer is inspected. Then, based on an inspection result, the adhesive on the joint surface of the processing target wafer is removed and the oxide film formed on the predetermined pattern on the joint surface of the processing target wafer is removed.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: June 26, 2018
    Assignees: Tokyo Electron Limited, INTEL CORPORATION
    Inventors: Shinji Okada, Masatoshi Shiraishi, Masatoshi Deguchi, Xavier Francois Brun, Charles Wayne Singleton, Jr., Kabirkumar Mirpuri
  • Patent number: 9659889
    Abstract: This disclosure relates generally to generating a solder-on-die using a water-soluble resist, system, and method. Heat may be applied to solder as applied to a hole formed in a water-soluble resist coating, the water-soluble resist coating being on a surface of an initial assembly. The initial assembly may include an electronic component. The surface may be formed, at least in part, by an electrical terminal of the electronic component, the hole being aligned, at least in part, with the electrical terminal. The solder may be reflowed, wherein the solder couples, at least in part, with the electrical terminal.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: May 23, 2017
    Assignee: Intel Corporation
    Inventors: Mihir Oka, Xavier Brun, Dingying David Xu, Edward Prack, Kabirkumar Mirpuri, Saikumar Jayaraman
  • Publication number: 20160240506
    Abstract: An electronic device including a solder structure and methods of forming an electrical interconnection are shown. Solder structures are shown including a solder ball formed from a first solder having a first melting temperature, and a connecting structure coupling the solder ball to one or more electrical connection pads, the connecting structure formed from a second solder having a second melting temperature lower than the first melting temperature. Electronic devices are shown including a polymer mold material formed over the solder structures.
    Type: Application
    Filed: April 25, 2016
    Publication date: August 18, 2016
    Inventor: Kabirkumar Mirpuri
  • Patent number: 9324680
    Abstract: An electronic device including a solder structure and methods of forming an electrical interconnection are shown. Solder structures are shown including a solder ball formed from a first solder having a first melting temperature, and a connecting structure coupling the solder ball to one or more electrical connection pads, the connecting structure formed from a second solder having a second melting temperature lower than the first melting temperature. Electronic devices are shown including a polymer mold material formed over the solder structures.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: April 26, 2016
    Assignee: Intel Corporation
    Inventor: Kabirkumar Mirpuri
  • Publication number: 20150179595
    Abstract: This disclosure relates generally to generating a solder-on-die using a water-soluble resist, system, and method. Heat may be applied to solder as applied to a hole formed in a water-soluble resist coating, the water-soluble resist coating being on a surface of an initial assembly. The initial assembly may include an electronic component. The surface may be formed, at least in part, by an electrical terminal of the electronic component, the hole being aligned, at least in part, with the electrical terminal. The solder may be reflowed, wherein the solder couples, at least in part, with the electrical terminal.
    Type: Application
    Filed: December 20, 2013
    Publication date: June 25, 2015
    Inventors: Mihir Oka, Xavier Brun, Dingying David Xu, Edward Prack, Kabirkumar Mirpuri, Saikumar Jayaraman
  • Publication number: 20150077962
    Abstract: An electronic device including a solder structure and methods of forming an electrical interconnection are shown. Solder structures are shown including a solder ball formed from a first solder having a first melting temperature, and a connecting structure coupling the solder ball to one or more electrical connection pads, the connecting structure formed from a second solder having a second melting temperature lower than the first melting temperature. Electronic devices are shown including a polymer mold material formed over the solder structures.
    Type: Application
    Filed: September 19, 2013
    Publication date: March 19, 2015
    Inventor: Kabirkumar Mirpuri
  • Publication number: 20150001706
    Abstract: A method includes positioning a solder mask on an integrated circuit (IC) package substrate with the solder mask having cavities that extend to the IC package substrate, applying molten solder to the flexible solder mask to fill the cavities of the solder mask with solder, and removing the solder mask to expose solder bumps on the IC package substrate. The molten solder includes silver and an additive to reduce formation of a silver compound that causes deformation of solder bumps.
    Type: Application
    Filed: June 27, 2013
    Publication date: January 1, 2015
    Inventors: Kabirkumar Mirpuri, Yoshihiro Tomita