Abstract: An apparatus and a method for beamforming with less heat in a wireless communication system including multiple antennas are provided. The apparatus includes a digital signal processor for processing at least one baseband digital signal, and at least one Radio Frequency (RF) signal processor for converting a respective baseband digital signal of the at least one baseband digital signal into an RF analog signal and for amplifying a power of the RF analog signal for one or more antenna elements constituting a respective antenna of the at least one antenna.

Abstract: An apparatus and method for power amplification in a wireless communication system are provided. The apparatus includes an envelope generator for generating an envelope signal from a Radio Frequency (RF) signal, a switching controller for generating a first switching control signal by delta-sigma modulating the envelope signal, and for generating a second switching control signal by amplifying an error signal obtained from a difference between an envelope signal restored by filtering the modulated envelope signal and an original envelope signal and an amplifier for outputting a first output signal by amplifying a phase signal according to the first switching control signal, for outputting a second output signal by amplifying the phase signal according to the second switching control signal, and for combining the first output signal and the second output signal. Thus, high efficiency and high linearity can be accomplished in the power amplification.

Abstract: A power amplifying apparatus based on envelope elimination and restoration (EER) includes a voltage amplifier to amplify a high frequency component of an envelope signal, a switching amplifier to generate a low frequency component signal of a drain bias based on a first pulse width modulation (PWM) signal that corresponds to a low frequency component of the envelope signal, and a push-pull switch, connected to the switching amplifier in parallel, to add a high frequency component signal to an output of the switching amplifier by pushing or pulling current to or from the output of the switching amplifier.

Abstract: A power amplifying apparatus based on envelope elimination and restoration (EER) includes a voltage amplifier to amplify a high frequency component of an envelope signal, a switching amplifier to generate a low frequency component signal of a drain bias based on a first pulse width modulation (PWM) signal that corresponds to a low frequency component of the envelope signal, and a push-pull switch, connected to the switching amplifier in parallel, to add a high frequency component signal to an output of the switching amplifier by pushing or pulling current to or from the output of the switching amplifier.

Abstract: An apparatus and method for power amplification in a wireless communication system are provided. The apparatus includes an envelope generator for generating an envelope signal from a Radio Frequency (RF) signal, a switching controller for generating a first switching control signal by delta-sigma modulating the envelope signal, and for generating a second switching control signal by amplifying an error signal obtained from a difference between an envelope signal restored by filtering the modulated envelope signal and an original envelope signal and an amplifier for outputting a first output signal by amplifying a phase signal according to the first switching control signal, for outputting a second output signal by amplifying the phase signal according to the second switching control signal, and for combining the first output signal and the second output signal. Thus, high efficiency and high linearity can be accomplished in the power amplification.

Abstract: An apparatus and a method for beamforming with less heat in a wireless communication system including multiple antennas are provided. The apparatus includes a digital signal processor for processing at least one baseband digital signal, and at least one Radio Frequency (RF) signal processor for converting a respective baseband digital signal of the at least one baseband digital signal into an RF analog signal and for amplifying a power of the RF analog signal for one or more antenna elements constituting a respective antenna of the at least one antenna.

Abstract: A digital-to-analog converter supporting high speed operation is defined. The converter includes a plurality of sampler circuits in electrical communication with a digital signal source and a summation circuit in electrical communication with the plurality of sampler circuits. A sampler circuit of the plurality of sampler circuits is adapted to sample a bit of a plurality of bits from the digital signal source with a half-sinusoidal signal forming a sampled signal. The sampler may include a plurality of diodes and a sinusoidal signal source. The sinusoidal signal source toggles the plurality of diodes on and off thereby forming the sampled signal at a sampler output port. The summation circuit is adapted to combine the sampled signal from each of the plurality of sampler circuits to form an analog signal portion representative of the plurality of bits. Exemplary summation circuits include an R-2R resistance ladder and a Wilkinson power combiner.

Abstract: A digital-to-analog converter supporting high speed operation is defined. The converter includes a plurality of sampler circuits in electrical communication with a digital signal source and a summation circuit in electrical communication with the plurality of sampler circuits. A sampler circuit of the plurality of sampler circuits is adapted to sample a bit of a plurality of bits from the digital signal source with a half-sinusoidal signal forming a sampled signal. The sampler may include a plurality of diodes and a sinusoidal signal source. The sinusoidal signal source toggles the plurality of diodes on and off thereby forming the sampled signal at a sampler output port. The summation circuit is adapted to combine the sampled signal from each of the plurality of sampler circuits to form an analog signal portion representative of the plurality of bits. Exemplary summation circuits include an R-2R resistance ladder and a Wilkinson power combiner.