Abstract: A circuit includes a sense circuit and a comparator having a first input and a second input, the first input coupled to the sense circuit. The circuit also includes a first transistor having a control terminal and a current terminal, the current terminal coupled to the second input of the comparator and an amplifier having an input and an output, the input coupled too the control terminal of the first transistor. Additionally, the circuit includes a second transistor having a control terminal and a current terminal, the control terminal coupled to the output of the amplifier and a capacitor having a terminal coupled to the current terminal of the second transistor and to the input of the amplifier.

Abstract: Provided here are methods and systems for converting pyrolysis oil with halogenated contaminants to a substantially halogen-free pyrolysis oil by treatment with an inert gas.

Abstract: A converter includes an inductor and a transistor. A sense circuit couples to the transistor. The sense circuit generates a sense signal responsive to a current through the first transistor. A comparator has first and second comparator inputs and a comparator output. The comparator output controls a signal to the transistor's control input. An error amplifier has an error amplifier input and an error amplifier output coupled to the first comparator input. A slope compensation circuit couples to at least one of the error amplifier output or the sense circuit and generates a slope signal. A peak detection sample/hold (PK-S/H) tracks the slope signal and, responsive to the transistor being turned off, samples the slope signal and provides the sampled slope signal on its output. The PK-S/H output couples to whichever of the error amplifier or sense circuit to which the slope compensation circuit is not coupled.

Abstract: Described embodiments include a voltage converter power circuit having a high-voltage rated first transistor with a first current terminal coupled to an input voltage terminal, and a second current terminal. A second transistor, a low-voltage rated transistor, has a second control terminal, a third current terminal coupled to the second current terminal, and a fourth current terminal coupled to a switching terminal. A third transistor, a high-voltage rated transistor, has a fifth current terminal coupled to the switching terminal, a sixth current terminal, and a third control terminal. A fourth transistor, a low-voltage rated transistor, is coupled between the sixth current terminal and a ground terminal. A bleeder circuit is coupled between the seventh and eighth current terminals and is configured to prevent a voltage across the fourth transistor from exceeding a breakdown voltage.

Abstract: A converter includes an inductor and a transistor. A sense circuit couples to the transistor. The sense circuit generates a sense signal responsive to a current through the first transistor. A comparator has first and second comparator inputs and a comparator output. The comparator output controls a signal to the transistor's control input. An error amplifier has an error amplifier input and an error amplifier output coupled to the first comparator input. A slope compensation circuit couples to at least one of the error amplifier output or the sense circuit and generates a slope signal. A peak detection sample/hold (PK-S/H) tracks the slope signal and, responsive to the transistor being turned off, samples the slope signal and provides the sampled slope signal on its output. The PK-S/H output couples to whichever of the error amplifier or sense circuit to which the slope compensation circuit is not coupled.

Abstract: A embedded overcurrent protection circuit within the PWM feedback controller (30) of a power converter (100) having an novel current limit detection function that minimizes the effects of the turn-on period of the power device (14) is disclosed herein. This power converter includes a current limit detection circuit (10–20) that is reset on the rising edge of the system clock in a first step. In a second step, the power device (14) that is turned on. In another step, a current detecting circuit (10–20) detects the drain-to-source voltage across the power device (14) and the output current generated thereby. A sense circuit (18) compares the output current detected with a first predetermined limit value in another step. When the output current is less than the first predetermined limit value, a step is conducted where the output current is regulated by modulating the pulse width of the signal sent by a driver (12) to the control node of the power device (14).

Abstract: A embedded overcurrent protection circuit within the PWM feedback controller (30) of a power converter (100) having an novel current limit detection function that minimizes the effects of the turn-on period of the power device (14) is disclosed herein. This power converter includes a current limit detection circuit (10-20) that is reset on the rising edge of the system clock in a first step. In a second step, the power device (14) that is turned on. In another step, a current detecting circuit (10-20) detects the drain-to-source voltage across the power device (14) and the output current generated thereby. A sense circuit (18) compares the output current detected with a first predetermined limit value in another step. When the output current is less than the first predetermined limit value, a step is conducted where the output current is regulated by modulating the pulse width of the signal sent by a driver (12) to the control node of the power device (14).

Abstract: An output stage provides increased current sourcing capability through a technique of local positive feedback. Current through a transistor MP2 is mirrored by the output current source IOUT that is desired to be increased. Without positive feedback, the gate of MN2 would be fixed by MP1 and MN1, and when input voltage VIN decreases by an incremental voltage &Dgr;V, the resulting current increase would distribute an increased voltage not only across MP2's VGS but also in the VGS of another transistor MN2; therefore, undesirably, not all of the &Dgr;V voltage change is mirrored in IOUT. However, if positive feedback such as MP5 is provided, the feedback dynamically increases the voltage at the gate of MN2. The increased voltage of MN2's gate essentially provides more voltage “headroom” for MP2 and MN2, and allows current through MP2 to increase with any voltage decrease in VIN.

Abstract: An output stage provides increased current sourcing capability through a technique of local positive feedback. Current through a transistor MP2 is mirrored by the output current source IOUT that is desired to be increased. Without positive feedback, the gate of MN2 would be fixed by MP1 and MN1, and when input voltage VIN decreases by an incremental voltage &Dgr;V, the resulting current increase would distribute an increased voltage not only across MP2's VGS but also in the VGS of another transistor MN2; therefore, undesirably, not all of the &Dgr;V voltage change is mirrored in IOUT. However, if positive feedback such as MP5 is provided, the feedback dynamically increases the voltage at the gate of MN2. The increased voltage of MN2's gate essentially provides more voltage “headroom” for MP2 and MN2, and allows current through MP2 to increase with any voltage decrease in VIN.