Patents by Inventor Kah Yong

Kah Yong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080175190
    Abstract: A multi-node media content distribution system is incorporated in portable slave node media content reproduction devices for sharing video, music, photo or any other media content files with other portable slave node media content reproduction devices wirelessly. The multi-node media content distribution system includes media content reproduction devices wirelessly configured as a network. One of the media content reproduction devices is designated as a master controller node media content reproduction device and provides the media content files to the network as a server. All remaining media content reproduction devices are slave nodes to the master controller node media content reproduction device to receive the media content files. The master controller node media content reproduction device encrypts the media content files with a unique encryption key that is known only to the member slave.
    Type: Application
    Filed: January 8, 2008
    Publication date: July 24, 2008
    Inventors: Kah Yong Lee, Ping Soon Kwok, Tai Chew Tan
  • Patent number: 6741659
    Abstract: A system for transmitting digitized samples of analog signals while concealing unrecoverable digitized samples of analog signals to maintain a level of fidelity in reproducing the analog signals. The digitized samples of the analog signals are burst transmitted such that the probability of interference with the transmission and thus corruption of the digitized samples of the analog signals is minimized. The digitized samples are received without synchronizing a receiving clock with a transmitting clock to capture the digitized samples of the analog signals. The digitized samples are converted from various sampling rates to digitized samples of the analog signals having a rate. Any large groups of digitized samples that are in error or corrupted in transmission are softly muted to avoid annoying clicks. Any long term difference between a transmit clock and a receive clock is tracked and the digitized samples are interpolated or decimated to eliminate any underrun or overrun of the digitized samples.
    Type: Grant
    Filed: October 25, 1999
    Date of Patent: May 25, 2004
    Assignee: FreeSystems Pte. Ltd.
    Inventors: Chee Oei Chan, Beng Huat Chua, Chee Kong Siew, Kah Yong Lee
  • Patent number: 6671325
    Abstract: A system for transmitting, receiving, recovering, and reproducing digitized samples of analog signals while concealing unrecoverable digitized samples of analog signals to maintain a level of fidelity in reproducing the analog signals. The digitized samples of the analog signals are burst transmitted such that the probability of interference with the transmission and thus corruption of the digitized samples of the analog signals is minimized. The digitized samples are received without synchronizing a receiving clock with a transmitting clock to capture the digitized samples of the analog signals. The digitized samples are converted from various sampling rates to digitized samples of the analog signals having a rate. Any large groups of digitized samples that are in error or corrupted in transmission are softly muted to avoid annoying clicks.
    Type: Grant
    Filed: October 30, 2002
    Date of Patent: December 30, 2003
    Assignee: Free Systems Pte. Ltd.
    Inventors: Kah Yong Lee, Beng Huat Chua, Chee Oei Chan, Chee Kong Siew
  • Patent number: 6614849
    Abstract: A system for transmitting, receiving, recovering, and reproducing digitized samples of analog signals while concealing unrecoverable digitized samples of analog signals to maintain a level of fidelity in reproducing the analog signals. The digitized samples of the analog signals are burst transmitted such that the probability of interference with the transmission and thus corruption of the digitized samples of the analog signals is minimized. The digitized samples are received without synchronizing a receiving clock with a transmitting clock to capture the digitized samples of the analog signals. The digitized samples are converted from various sampling rates to digitized samples of the analog signals having a rate. Any large groups of digitized samples that are in error or corrupted in transmission are softly muted to avoid annoying clicks.
    Type: Grant
    Filed: October 25, 1999
    Date of Patent: September 2, 2003
    Assignee: Free Systems Pte. Ltd.
    Inventors: Chee Oei Chan, Beng Huat Chua, Chee Kong Siew, Kah Yong Lee
  • Publication number: 20030154347
    Abstract: A method for reducing power consumption within a processing architecture, the processing architecture including a processor and a memory device, the memory device having a memory cell, the processor having a processing element, the processor configured to read from the memory device and write to the memory device is described. The method comprises configuring the memory with logical processing circuits internal to the memory device which access the memory cell, performing logical operations to data within the memory cell utilizing the logical processing circuits within the memory device, and performing mathematical operations within the processing element of the processor. The method is embodied through a logic memory which significantly reduces power consumption of digital signal processors, microprocessors, micro-controllers or other computation engines in electronic systems.
    Type: Application
    Filed: July 10, 2002
    Publication date: August 14, 2003
    Inventors: Wei Ma, Jie Liang, Kah Yong Lee, Kiak Wei Khoo
  • Publication number: 20030053548
    Abstract: A system for transmitting, receiving, recovering, and reproducing digitized samples of analog signals while concealing unrecoverable digitized samples of analog signals to maintain a level of fidelity in reproducing the analog signals. The digitized samples of the analog signals are burst transmitted such that the probability of interference with the transmission and thus corruption of the digitized samples of the analog signals is minimized. The digitized samples are received without synchronizing a receiving clock with a transmitting clock to capture the digitized samples of the analog signals. The digitized samples are converted from various sampling rates to digitized samples of the analog signals having a rate. Any large groups of digitized samples that are in error or corrupted in transmission are softly muted to avoid annoying clicks.
    Type: Application
    Filed: October 30, 2002
    Publication date: March 20, 2003
    Applicant: Free Systems Pte., Ltd.
    Inventors: Kah Yong Lee, Beng Huat Chua, Chee Oei Chan, Chee Kong Siew
  • Patent number: 6510182
    Abstract: A system for transmitting, receiving, recovering, and reproducing digitized samples of analog signals while concealing unrecoverable digitized samples of analog signals to maintain a level of fidelity in reproducing the analog signals. The digitized samples of the analog signals are burst transmitted such that the probability of interference with the transmission and thus corruption of the digitized samples of the analog signals is minimized. The digitized samples are received without synchronizing a receiving clock with a transmitting clock to capture the digitized samples of the analog signals. The digitized samples are converted from various sampling rates to digitized samples of the analog signals having a rate. Any large groups of digitized samples that are in error or corrupted in transmission are softly muted to avoid annoying clicks.
    Type: Grant
    Filed: October 25, 1999
    Date of Patent: January 21, 2003
    Assignee: FreeSystems Pte. Ltd.
    Inventors: Kah Yong Lee, Bena Huat Chua, Chee Oei Chan, Chee Kong Siew
  • Patent number: 6424687
    Abstract: A method and device to synchronize sampled digital data transferred from an input section to an output section prevents data overrun or underrun due to timing differences of timing signals of the input and output section. The timing synchronization device has an input sampled data counter to determine a number of samples in a frame time of the input sampled data. The timing synchronization device further has an interpolator to estimate data sample values for each sample of the input sampled data to coincide with each sample of the output sampled data if the number of samples in said input sampled data is less than an expected number of samples in said output sampled data.
    Type: Grant
    Filed: March 15, 1999
    Date of Patent: July 23, 2002
    Assignee: Cirrus Logic, Inc.
    Inventors: Wenshun Tian, Kah Yong