Abstract: A memory with built-in synchronous-write-through (SWT) redundancy includes a plurality of memory input/output (IO) arrays, a plurality of SWT circuits, and at least one spare SWT circuit. The at least one spare SWT circuit is used to replace at least one of the plurality of SWT circuits that is defective.

Abstract: The present disclosure provides a test system and method. The test system is configured to analyze a system platform and includes a data collector and a test monitor. The data collector is configured to receive a signal transmitted between a controller and a memory of the system platform and is configured to process the signal to generate a processed signal. The test monitor is configured to encode the processed signal into a log information, so as to determine an operation status of the system platform according to the log information.

Abstract: The present disclosure provides a test system and method. The test system is configured to analyze a system platform and includes a data collector and a test monitor. The data collector is configured to receive a signal transmitted between a controller and a memory of the system platform and is configured to process the signal to generate a processed signal. The test monitor is configured to encode the processed signal into a log information, so as to determine an operation status of the system platform according to the log information.

Abstract: A fault analysis device and a fault analysis method of the fault analysis device are provided. A sensing circuit senses a first distorted signal on a first signal transmission path of an abnormal signal device when the abnormal signal device performs a preset operation. A signal generating circuit provides a fault test signal to a second signal transmission path of a standard device corresponding to the first signal transmission path when the standard device performs the preset operation, so as to generate a second distorted signal on the second signal transmission path, where the first distorted signal and the second distorted signal have the same signal distortion characteristics.

Abstract: A digital-to-analog converter (DAC)-based voltage-mode transmit driver architecture. One example transmit driver circuit generally includes an impedance control circuit coupled to a plurality of DAC driver slices. The impedance control circuit generally includes a tunable impedance configured to be adjusted to match a load impedance for the transmit driver circuit. Another example transmit driver circuit generally has an output impedance that is smaller than the load impedance for the transmit driver circuit, such that an output voltage swing at differential output nodes of the transmit driver circuit is greater than a voltage of a power supply rail. Another example transmit driver circuit generally includes a predriver circuit with a first inverter coupled to a first output of the predriver circuit and a second inverter coupled to a second output of the predriver circuit, the transistors in at least one of the first inverter or the second inverter having different strengths.

Abstract: A gene editing system comprising: (a) a Type V CRISPR nuclease polypeptide or a first nucleic acid encoding the Type V CRISPR nuclease polypeptide; (b) a reverse transcriptase (RT) polypeptide or a second nucleic acid encoding the RT polypeptide; (c) a guide RNA (gRNA) or a third nucleic acid encoding the gRNA, wherein the gRNA comprises one or more binding sites recognizable by the Type V CRISPR nuclease (CRISPR nuclease binding sites) and a spacer sequence specific to a target sequence within a genomic site of interest, the target sequence being adjacent to a protospacer adjacent motif (PAM); and (d) a reverse transcription donor RNA (RT donor RNA) or a fourth nucleic acid encoding the RT donor RNA, wherein the RT donor RNA comprises a primer binding site (PBS) and a template sequence.

Abstract: Analog-to-digital converter circuitry includes comparator circuitry, capacitor analog-to-digital converter circuitry (CDA), and successive approximation register (SAR) circuitry. The comparator circuitry includes a non-inverting input and an inverting input to selectively receive a differential voltage signal, and an output. The CDAC circuitry includes a first capacitor network having a first plurality of capacitors. A first capacitor of the first plurality of capacitors includes a first terminal connected to the non-inverting input and a second terminal selectively connected to a first voltage potential and a second voltage potential. The first voltage potential is greater than the second voltage potential. The SAR circuitry is connected to the output and the first capacitor network, and connects, during a first period, the second terminal of the first capacitor to the second voltage potential.

Abstract: A fan module comprises a frame, a wire-stopping structure, an impeller and a circuit board. The frame includes a frame wall, a base, a plurality of static blades and a connector. A wire groove formed on an outside of the frame wall to accommodate a wire. The static blades are radially connected to the base and the frame wall. The connector is formed on the outside of the frame wall and extended from one end of the wire groove to the base along one of the static blades. The connector includes a plurality of pins. The wire-stopping board is fixed to the frame wall to cover the wire groove. The impeller is disposed in the frame. The circuit board is disposed in the frame and located on the base. The circuit board includes a plurality of pin holes, and the pin holes are electrically connected to the pins.

Abstract: A digital-to-analog converter (DAC)-based voltage-mode transmit driver architecture. One example transmit driver circuit generally includes an impedance control circuit coupled to a plurality of DAC driver slices. The impedance control circuit generally includes a tunable impedance configured to be adjusted to match a load impedance for the transmit driver circuit. Another example transmit driver circuit generally has an output impedance that is smaller than the load impedance for the transmit driver circuit, such that an output voltage swing at differential output nodes of the transmit driver circuit is greater than a voltage of a power supply rail. Another example transmit driver circuit generally includes a predriver circuit with a first inverter coupled to a first output of the predriver circuit and a second inverter coupled to a second output of the predriver circuit, the transistors in at least one of the first inverter or the second inverter having different strengths.

Abstract: A fan frame includes a metal base and a frame body. The metal base has a center portion, a plurality of supporting portions with strip shapes and a plurality of wing portions. Each of the supporting portions has a head end, a middle part and a tail end. The head end connects to a peripheral part of the center portion. The wing portions extend outwardly at an angle from the middle parts of the supporting portions, respectively. The frame body has a frame wall. The wing portions are partially at least covered by the frame body. Another fan frame is also disclosed.

Abstract: Analog-to-digital converter circuitry includes comparator circuitry, capacitor analog-to-digital converter circuitry (CDA), and successive approximation register (SAR) circuitry. The comparator circuitry includes a non-inverting input and an inverting input to selectively receive a differential voltage signal, and an output. The CDAC circuitry includes a first capacitor network having a first plurality of capacitors. A first capacitor of the first plurality of capacitors includes a first terminal connected to the non-inverting input and a second terminal selectively connected to a first voltage potential and a second voltage potential. The first voltage potential is greater than the second voltage potential. The SAR circuitry is connected to the output and the first capacitor network, and connects, during a first period, the second terminal of the first capacitor to the second voltage potential.

Abstract: A gene editing system comprising: (a) a Type V CRISPR nuclease polypeptide or a first nucleic acid encoding the Type V CRISPR nuclease polypeptide; (b) a reverse transcriptase (RT) polypeptide or a second nucleic acid encoding the RT polypeptide; (c) a guide RNA (gRNA) or a third nucleic acid encoding the gRNA, wherein the gRNA comprises one or more binding sites recognizable by the Type V CRISPR nuclease (CRISPR nuclease binding sites) and a spacer sequence specific to a target sequence within a genomic site of interest, the target sequence being adjacent to a protospacer adjacent motif (PAM); and (d) a reverse transcription donor RNA (RT donor RNA) or a fourth nucleic acid encoding the RT donor RNA, wherein the RT donor RNA comprises a primer binding site (PBS) and a template sequence.

Abstract: Embodiments herein describe placing a filter network at one of the inputs of the comparator to avoid injecting unequal amounts of kickback noise into the inputs of the comparator. In one embodiment, the filter network matches the impedance seen at the inputs of the comparator. As a result, the amount of kickback noise is essentially equal at the inputs even though the input signals may be at different frequencies. Thus, the kickback noise is essentially cancelled out so that this noise has little to no impact on the output of the comparator.

Abstract: Provided is a smart electronic lock and method for using same. The smart electronic lock includes an electronic lock body having a USB socket internally connected to a main control board for driving a driver to connect to an electronic lock cylinder, and a handheld device having a main power source and an unlocking unit for allowing user to input an unlocking password through an unlocking application, as well as a USB connection cable that is removably connected between the handheld device and the electronic lock body. The smart electronic lock eliminates the need of configuring an internal power source or a battery and allows the handheld device to supply power to the main control board through a USB charging port. The unlocking of the electronic lock body is attained by the comparison result of an inputted unlocking password.

Abstract: A fan frame includes a metal base and a frame body. The metal base has a center portion, a plurality of supporting portions with strip shapes and a plurality of wing portions. Each of the supporting portions has a head end, a middle part and a tail end. The head end connects to a peripheral part of the center portion. The wing portions extend outwardly at an angle from the middle parts of the supporting portions, respectively. The frame body has a frame wall. The wing portions are partially at least covered by the frame body. Another fan frame is also disclosed.

Abstract: A dual-trajectory pedicle screw system includes an internally threaded sleeve and including first part and cylindrical second part, the first part being recessed to form a space, and the second part including projections on top; a main screw including a universal head and a first conic member, the universal head including first and second threaded holes, the first threaded hole being inclined at a first angle, the second threaded hole being inclined at a different second angle, bottom of the universal head being a convex and rotatably disposed in the space; and an auxiliary screw including external threads threadedly secured to the first or second threaded hole so that the auxiliary screw is secured to the main screw at the first or second angle with respect to the main screw, a second conic member extending downward from the external threads, and a fitting member on top of the external threads.

Abstract: A high power module is provided, which includes a substrate, plural first power chips, plural second power chips, a positive electrode plate and a negative electrode plat. The substrate includes a first metal area, a second metal area, a third metal area disposed between the first metal area and the second metal area. The first power chips are disposed on the third metal area and connected to the first metal area via plural first connection elements. The second power chips are disposed on the second metal area and connected to the third metal area via plural second connection elements. The positive electrode plate is C-shaped and connected to the first metal area. The negative electrode plate is C-shaped and connected to the second metal area; the direction of the opening of the negative electrode plate is contrary to that of the opening of the positive electrode plate.

Abstract: A semiconductor device includes an insulating thermal substrate, a metal wiring layer and a heat-dissipation component. The metal wiring layer includes a plurality of engaging structures. The plurality of engaging structures is disposed between the insulating thermal substrate and the heat-dissipation component, and the heat-dissipation component applies solder structures to connect the metal wiring layer by having the solder structures to wrap partly the plurality of engaging structures. In addition, a method for fabricating the same semiconductor device is also provided.

Abstract: A fan frame module comprises a frame and a wire-stopping structure. In the frame, an outer wall is divided into a first side section, a first mid section, a central section, a second mid section and a second side section in a first direction. The extension direction of the major axis of the central section is parallel to the central axis of the frame, and the first direction is perpendicular to the extension direction of the major axis of the central section. A wire groove is formed on the first mid section to accommodate a wire. A fastening portion is disposed on one side of the wire groove. A positioning portion is disposed on the other one side of the wire groove. The wire-stopping structure is held by the fastening portion and the positioning portion, and fixed to the outer wall.