Patents by Inventor Kai An

Kai An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240054835
    Abstract: A validator device for a passenger transportation system includes a reader module configured to detect an electronic medium identifier of an open payment ticket medium. Data memory of the validator device stores a denial data set containing at least one denied electronic medium identifier and at least one denial attribute assigned to the denied electronic medium identifier. A comparator module identifies a denied electronic medium identifier from the at least one denied electronic medium identifier contained in the denial data set by comparing the detected electronic medium identifier with the at least one denied electronic medium identifier. A verification module checks, upon identification of a denied electronic medium identifier, whether the at least one denial attribute assigned to the identified denied electronic medium identifier satisfies predetermined denial criterion.
    Type: Application
    Filed: July 26, 2023
    Publication date: February 15, 2024
    Inventor: Kai Oelert
  • Publication number: 20240056986
    Abstract: A wireless device receives a radio resource control message comprising a first sounding reference signal (SRS) resource set identifier of a first SRS resource set of a serving cell and a second SRS resource set identifier of a second SRS resource set of the serving cell. The wireless device transmits a power headroom report (PHR) medium access control control element (MAC CE) comprising a first field indicating a first power headroom value associated with the first SRS resource set and a second field indicating a second power headroom value associated with the second SRS resource set. The order of the first field and the second field in the PHR MAC CE is based on an ascending order of the first SRS resource set identifier and the second SRS resource set identifier.
    Type: Application
    Filed: October 19, 2023
    Publication date: February 15, 2024
    Applicant: Ofinno, LLC
    Inventors: Hyoungsuk Jeon, Esmael Hejazi Dinan, Ali Cagatay Cirik, Kai Xu, Kyungmin Park
  • Publication number: 20240053596
    Abstract: A control device for a microscope includes an actuator configured to shift a microscopic field of view relative to a sample, and an operating device configured to be operated by a user to control the actuator in accordance with a response characteristic determining a shift sensitivity. The field of view is shifted relative to the sample in response to a user operation of the operating device. The control device further includes a processor configured to determine a total visual magnification, and to control the response characteristic of the operating device based on the total visual magnification. The field of view is visualized by the microscope to the user based on the total visual magnification.
    Type: Application
    Filed: November 30, 2021
    Publication date: February 15, 2024
    Inventors: Oliver KEUL, Volker SCHACHT, Kai RITSCHEL
  • Publication number: 20240054380
    Abstract: Aspects of the present disclosure relate generally to parallel sideband cooling of multiple trapped-ion motional modes with deflectors (e.g., acousto-optic deflectors or AODs) in quantum information processing (QIP) systems. A method and a system are described in which for an ion chain a first group of ions (e.g., middle section of the ion chain) and a second group of ions (e.g., outer sections of the ion chain) are identified. The method and system include performing sideband cooling by applying, to the first group of ions, a first pair of optical beams using a first pair of AODs, and applying, to the second group of ions, a second pair of optical beams using a second pair of AODs. For each AOD, an acousto-optic modulator (AOM) may be placed upstream to provide frequency modulation for matching frequency differences for correct detuning as part of the sideband cooling operation.
    Type: Application
    Filed: December 6, 2022
    Publication date: February 15, 2024
    Inventors: Jeremy Matthew SAGE, Kai HUDEK
  • Publication number: 20240055263
    Abstract: A method for manufacturing a sigma-shaped groove in a semiconductor substrate includes: step 1: performing the first etching to form a U-shaped groove in a selected area of the substrate; step 2: performing a second etching configured to expand an opening width of the top sub-groove outward laterally, without changing an opening width of the bottom sub-groove and a depth of the groove; and step 3: performing the third etching which has different etching rates on different crystal surfaces of the semiconductor substrate to further expand the groove into a sigma-shaped groove with a sigma-shaped cross section. An increase of the opening width of the top sub-groove shifts the upper side surface towards an outer side of the sigma-shaped groove, resulting in an upward shift of the apex and reduces a vertical spacing between the apex and top surface of the semiconductor substrate, thereby improving the device performance.
    Type: Application
    Filed: February 27, 2023
    Publication date: February 15, 2024
    Inventors: Lian Lu, Yizheng Zhu, Kai Qian
  • Publication number: 20240056580
    Abstract: A method of video processing includes performing a conversion between a video including a video region and a bitstream of the video according to a rule. The rule specifies a relationship between enablement of a palette mode and a coding type of the video region. The video region may represent a coding block of the video.
    Type: Application
    Filed: October 12, 2023
    Publication date: February 15, 2024
    Inventors: Jizheng Xu, Zhipin Deng, Li Zhang, Hongbin Liu, Kai Zhang
  • Publication number: 20240052818
    Abstract: A pump system includes a housing defining a first internal volume and a second internal volume, a first piston positioned to separate the first internal volume into a first chamber and a second chamber, a second piston positioned to separate the second internal volume into a third chamber and a fourth chamber, a first inlet check valve configured to permit fluid flow into the first chamber, a second inlet check valve configured to permit fluid flow into the third chamber, a directional control valve (DCV) repositionable between (a) a first position where the DCV is configured to fluidly couple the second chamber to a high pressure fluid source and (b) a second position where the DCV is configured to fluidly couple the fourth chamber to the high pressure fluid source, and a relief valve configured to supply a fluid to the DCV through an orifice to move the DCV.
    Type: Application
    Filed: October 23, 2023
    Publication date: February 15, 2024
    Applicant: Oshkosh Corporation
    Inventors: Kai P. Schubart, Christopher J. Rukas, Patrick S. Dillman, Erik S. Ellifson, Aaron J. Rositch
  • Publication number: 20240053778
    Abstract: Example embodiments relate to a gas-pressure regulator having an inlet, an outlet, a housing, a diaphragm, a control chamber and a discharge chamber. The inlet and the outlet each open onto the control chamber, wherein the diaphragm partially delimits the control chamber. A passage between the control chamber and the discharge chamber is open in one position of the diaphragm. A movable limiting element limits a movement of the diaphragm in one direction.
    Type: Application
    Filed: October 13, 2021
    Publication date: February 15, 2024
    Inventor: Kai ARMESTO-BEYER
  • Publication number: 20240055051
    Abstract: Technology is disclosed herein reconfiguring word lines as either data word lines or dummy word lines. In a sub-block mode reconfigurable word lines are used as dummy word lines that provide electrical isolation between data word lines in a block. The block may be divided into an upper tier, a middle tier, and a lower tier, with the reconfigurable word lines within the middle tier. In a full-block mode the reconfigurable group of the word lines are used as data word lines. Because the reconfigurable word lines are used as data word lines in the full-block mode storage capacity is greater in the full-block mode than in the sub-block mode. Moreover, because the sub-blocks are smaller in size but greater in number than the full-blocks, the memory system may be provisioned with fewer blocks and still meet user storage requirements in both the full-block mode and the sub-block mode.
    Type: Application
    Filed: August 15, 2022
    Publication date: February 15, 2024
    Applicant: SanDisk Technologies LLC
    Inventors: Xiang Yang, YenLung Li, James Kai
  • Publication number: 20240050094
    Abstract: The present disclosure provides a stapler, including a shell, an ejector plate pin, a cartridge pin, an anvil pin, an unlocking pin, an ejector plate ring, a cartridge ring and an anvil ring, where the cartridge pin is between the ejector plate pin and the anvil pin; the ejector plate ring, the cartridge ring and the anvil ring all include a first half ring and a second half ring; hinged ends of the first half rings and the second half rings are rotatably connected, and fixed ends of the second half rings of the ejector plate ring, the cartridge ring and the anvil ring are connected to the front ends of the ejector plate pin, the cartridge pin and the anvil pin, respectively. The present disclosure adopts a brand-new concept of eversion anastomosis, and ensures the smoothness of a lumen after anastomosis.
    Type: Application
    Filed: January 7, 2022
    Publication date: February 15, 2024
    Inventors: Jianxin XUE, Yun GUO, Zengjun WANG, Yong FENG, Chunmei CHEN, Xiao LI, Kai ZHU
  • Publication number: 20240055072
    Abstract: The technology disclosed relates to splice site prediction and aberrant splicing detection. In particular, it relates to a splice site predictor that includes a convolutional neural network trained on training examples of donor splice sites, acceptor splice sites, and non-splicing sites. An input stage of the convolutional neural network feeds an input sequence of nucleotides for evaluation of target nucleotides in the input sequence. An output stage of the convolutional neural network translates analysis by the convolutional neural network into classification scores for likelihoods that each of the target nucleotides is a donor splice site, an acceptor splice site, and a non-splicing site.
    Type: Application
    Filed: September 29, 2023
    Publication date: February 15, 2024
    Inventors: Kishore Jaganathan, Kai-How Farh, Jeremy Francis McRae, Sofia Kyriazopoulou Panagiotopoulou
  • Publication number: 20240057214
    Abstract: Current wireless networks do not allow machine type communication (MTC) devices to have long discontinuous reception (DRX) cycles or sleep lengths. A long DRX cycle may allow MTC systems and devices to operate with much longer DRX/Sleep cycles/periods. This may facilitate the MTC operations for infrequent system access or infrequent system reaching (e.g. paged once in a week) with no or low mobility and may allow MTC devices to sleep for a long time with low power consumption.
    Type: Application
    Filed: October 25, 2023
    Publication date: February 15, 2024
    Applicant: InterDigital Patent Holdings, Inc.
    Inventors: Ulises Olvera-Hernandez, Ghyslain Pelletier, Peter S. Wang, Kai Liu, Guanzhou Wang, Marian Rudolf, Samian Kaur, Michael F. Starsinic
  • Publication number: 20240056612
    Abstract: A mechanism for processing video data is disclosed. A conversion is performed between a visual media data including a video unit and a bitstream. The conversion can be performed by a video encoder and/or a video decoder. The video unit is reconstructed, and a guided filter is applied to reconstructed samples in the video unit.
    Type: Application
    Filed: October 11, 2023
    Publication date: February 15, 2024
    Inventors: Wenbin Yin, Li Zhang, Kai Zhang, Yang Wang, Hongbin Liu
  • Publication number: 20240056188
    Abstract: Embodiments of this application provide an optical power adjustment system and an optical power adjustment apparatus. The system includes a multi-mode light source, a mode demultiplexer, and an optical power adjustment apparatus. The multi-mode light source is configured to output a multi-mode optical signal, where the multi-mode optical signal includes N transverse-mode optical signals, N=2M, and M is an integer greater than 1. The mode demultiplexer is configured to convert the N transverse-mode optical signals into N fundamental-mode optical signals, and output the N fundamental-mode optical signals. The optical power adjustment apparatus includes M optical power adjustment modules and a control apparatus, each optical power adjustment module includes a plurality of phase shifters, and the control apparatus is electrically connected to the M optical power adjustment modules. A Kth optical power adjustment module includes 2K?1 multi-mode interferometers MMIs.
    Type: Application
    Filed: October 27, 2023
    Publication date: February 15, 2024
    Inventors: Linbojie Huang, Chao Pan, Kai Zhang
  • Publication number: 20240057264
    Abstract: A method of manufacturing an electronic device including the following steps is provided herein. A plurality of first electronic components is provided. The plurality of first electronic components is transferred onto a plurality of pickup sites. An empty pickup site from the plurality of pickup sites may be figured out, wherein the plurality of first electronic components is absent at the empty pickup site. A second electronic component is transferred onto the empty pickup site. A target substrate is provided. The plurality of first electronic components and the second electronic component are transferred onto the target substrate.
    Type: Application
    Filed: October 27, 2023
    Publication date: February 15, 2024
    Applicant: Innolux Corporation
    Inventors: Kai Cheng, Fang-Ying Lin, Tsau-Hua Hsieh
  • Publication number: 20240050984
    Abstract: A polymer plastic front plate comprises: a plastic substrate and a hard coating layer formed on an adhesion surface of the plastic substrate. The hard coating layer comprises: organic-inorganic hybrid UV oligomer, high Tg UV resin additive, a plurality of dispersed flaky nano inorganic material, and photo initiator, so as to form a gas barrier hard coating layer with high surface dyne value (>44 dyne) on the adhesion surface of the plastic substrate. It not only has good ink printability and OCA adhesiveness, but also inhibits the diffusion of fugitive gas from polymer plastic front plates during high-temperature, high-temperature and high-humidity, high-low temperature thermal shocks and other harsh automotive industry environmental tests. The gas can be avoided from entering the OCA layer, thereby solving the problems of bubbles and delamination after the environmental tests are performed.
    Type: Application
    Filed: October 17, 2023
    Publication date: February 15, 2024
    Applicant: ENFLEX CORPORATION
    Inventors: Hsin Yuan CHEN, Chun Kai WANG, Yu Ling CHIEN
  • Publication number: 20240057487
    Abstract: An RRAM includes a bottom electrode, a resistive switching layer and a top electrode. The bottom electrode includes an inverted T-shaped profile. The resistive switching layer covers the bottom electrode. The top electrode covers the resistive switching layer. The inverted T-shaped profile includes a bottom element and a vertical element. The vertical element is disposed on the bottom element. The shape of the vertical element includes a rectangle or a trapezoid.
    Type: Application
    Filed: September 6, 2022
    Publication date: February 15, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Kai-Jiun Chang, Chun-Hung Cheng, Chuan-Fu Wang
  • Publication number: 20240054376
    Abstract: Aspects of the present disclosure relate generally to systems and methods for use in the implementation and/or operation of quantum information processing (QIP) systems, and more particularly, to the use of deflectors in trapped ion QIP systems for individually addressing long ion chains. Methods are described for using acousto-optic deflectors (AODs) in optical Raman transitions to implement single-qubit gates and two-qubit gates. A QIP system is also described that is configured to use AODs in optical Raman transitions to implement single-qubit gates and two-qubit gates.
    Type: Application
    Filed: December 6, 2022
    Publication date: February 15, 2024
    Inventors: Kai Makoto HUDEK, Jeremy Matthew SAGE, Neal PISENTI
  • Publication number: 20240056584
    Abstract: Symmetric motion vector difference coding is described. One example video processing method includes determining, for a conversion between a block of a current picture of video and a bitstream representation of the block, whether a symmetric motion vector difference (SMVD) mode is allowable for the block. Whether the SMVD mode is allowable depends on a derivation process of two target reference pictures of the current picture, which includes a first step for searching a forward target reference picture in the reference picture list 0 and searching a backward target reference picture in the reference picture list 1, and a second step for searching a backward target reference picture in the reference picture list 0 and searching a forward target reference picture in the reference picture list 1. Outputs of the first and second steps are independent of each other. The method further includes performing the conversion based on the determination.
    Type: Application
    Filed: October 17, 2023
    Publication date: February 15, 2024
    Inventors: Hongbin Liu, Li Zhang, Kai Zhang, Zhipin Deng, Yue Wang
  • Publication number: 20240053960
    Abstract: Techniques are disclosed relating to circuitry for floating-point division. In some embodiments, the circuitry is configured to generate a subnormal result for a division operation that divides a numerator by a denominator. The circuitry may include floating-point circuitry configured to perform a reciprocal operation to determine a normalized mantissa value for the reciprocal of a floating-point representation of the denominator. The circuitry may further include fixed-point circuitry configured to multiply a fixed-point representation of the normalized mantissa value for the reciprocal by a mantissa of the numerator to generate an initial value. Control circuitry may determine error data for the initial value and generate a final subnormal mantissa result for the division operation based on the error data and the initial value. Embodiments with multiple modes with different accuracy guarantees are disclosed.
    Type: Application
    Filed: October 18, 2023
    Publication date: February 15, 2024
    Inventors: Liang-Kai Wang, Ian R. Ollmann, Anthony Y. Tai