Patents by Inventor Kai Chao
Kai Chao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11982729Abstract: A motor inverter is provided. The motor inverter is coupled to an input power source and a motor and controls the mechanical switch to receive or turn off the input power source. The motor inverter includes primary and secondary auxiliary circuits, a microprocessor, a gate driver, and a motor drive circuit. The primary and secondary auxiliary circuits are coupled to the input power source and outputs first and second output voltages respectively. The microprocessor operates the driving switches of the motor drive circuit through the gate driver to switch the input power source for driving the motor. If the microprocessor determines that the first output voltage is abnormal and the motor rotational speed exceeds a safe speed limit, the microprocessor controls the driving switches to form an active short circuit for stopping the motor, and the microprocessor turns off the mechanical switch for protecting the input power source.Type: GrantFiled: July 26, 2022Date of Patent: May 14, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Kuo-Heng Chao, Yu-Kai Chang
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Patent number: 11983351Abstract: A touch data transmission method of present disclosure includes: generating a header information by a first controller according to a detected touch event; generating a first checksum information by the first controller according to the header information; storing the header information and the first checksum information to a memory by the first controller; and, storing a plurality of position information of the detected touch event to the memory by the first controller.Type: GrantFiled: March 14, 2023Date of Patent: May 14, 2024Assignee: HIMAX TECHNOLOGIES LIMITEDInventors: Chun-Kai Chuang, Jan-Ruei Lin, Yu-Hsiang Lin, I-Sheng Chao
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Patent number: 11973021Abstract: A semiconductor device includes a first metal layer, a second metal layer, and an inter-metal dielectric layer disposed between the first metal layer and the second metal layer. The inter-metal dielectric layer includes: a first dielectric layer disposed on the first metal layer and in direct contact with the first metal layer, wherein the first dielectric layer has a stress value less than 0; a second dielectric layer disposed on the first dielectric layer, wherein the second dielectric layer has a stress value greater than 0; and a third dielectric layer disposed on the second dielectric layer, wherein the third dielectric layer has a stress value less than 0. A thickness of the third dielectric layer is greater than a thickness of the second dielectric layer, and the thickness of the second dielectric layer is greater than a thickness of the first dielectric layer.Type: GrantFiled: September 17, 2021Date of Patent: April 30, 2024Assignee: Vanguard International Semiconductor CorporationInventors: Kai-Chun Chen, Shih-Ming Tseng, Hsing-Chao Liu, Hsiao-Ying Yang
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Patent number: 11940486Abstract: A probe station includes a frame, a platform, a testing equipment, a probe holder and at least one probe. The frame defines an accommodation space. The platform is connected with the frame. The platform has an opening. The opening is communicated with the accommodation space. The testing equipment is at least partially disposed in the accommodation space and is at least partially exposed through the opening. The probe holder is disposed on the platform. The probe is held by the probe holder. The probe holder is configured to control the probe to contact with a device under test disposed on the testing equipment through the opening.Type: GrantFiled: June 1, 2022Date of Patent: March 26, 2024Assignee: NANYA TECHNOLOGY CORPORATIONInventor: Yi-Kai Chao
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Publication number: 20230395657Abstract: A semiconductor device includes a substrate having a logic region and a high-voltage (HV) region, a first gate structure on the HV region, a first epitaxial layer and a second epitaxial layer adjacent to one side of the first gate structure, a first contact plug between the first epitaxial layer and the second epitaxial layer, a third epitaxial layer and a fourth epitaxial layer adjacent to another side of the first gate structure, and a second contact plug between the third epitaxial layer and the fourth epitaxial layer. Preferably, a bottom surface of the first epitaxial layer is lower than a bottom surface of the first contact plug and a bottom surface of the third epitaxial layer is lower than a bottom surface of the second contact plug.Type: ApplicationFiled: August 18, 2023Publication date: December 7, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Cheng-Pu Chiu, Tzung-Ying Lee, Dien-Yang Lu, Chun-Kai Chao, Chun-Mao Chiou
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Publication number: 20230393191Abstract: A probe station includes a frame, a platform, a testing equipment, a probe holder and at least one probe. The frame defines an accommodation space. The platform is connected with the frame. The platform has an opening. The opening is communicated with the accommodation space. The testing equipment is at least partially disposed in the accommodation space and is at least partially exposed through the opening. The probe holder is disposed on the platform. The probe is held by the probe holder. The probe holder is configured to control the probe to contact with a device under test disposed on the testing equipment through the opening.Type: ApplicationFiled: June 1, 2022Publication date: December 7, 2023Inventor: Yi-Kai CHAO
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Patent number: 11774491Abstract: The present application provides a testing system. The testing system includes a chip socket and a probe. The chip socket includes a pedestal and a fastener. The pedestal is configured to accommodate a chip to be tested. The fastener includes a top body and a base body. The top body includes a probing window surrounded by a plurality of side walls, wherein the probing window has a first end at an outer surface of the top body and a second end at an inner surface of the top body, a first angle between a first side wall of the plurality of side walls and the outer surface is less than 90 degrees, and a first opening area at the first end of the probing window is larger than a second opening area at the second end of the probing window.Type: GrantFiled: June 8, 2022Date of Patent: October 3, 2023Assignee: NANYA TECHNOLOGY CORPORATIONInventor: Yi-Kai Chao
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Patent number: 11764261Abstract: A semiconductor device includes a substrate having a logic region and a high-voltage (HV) region, a first gate structure on the HV region, a first epitaxial layer and a second epitaxial layer adjacent to one side of the first gate structure, a first contact plug between the first epitaxial layer and the second epitaxial layer, a third epitaxial layer and a fourth epitaxial layer adjacent to another side of the first gate structure, and a second contact plug between the third epitaxial layer and the fourth epitaxial layer. Preferably, a bottom surface of the first epitaxial layer is lower than a bottom surface of the first contact plug and a bottom surface of the third epitaxial layer is lower than a bottom surface of the second contact plug.Type: GrantFiled: February 14, 2022Date of Patent: September 19, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Cheng-Pu Chiu, Tzung-Ying Lee, Dien-Yang Lu, Chun-Kai Chao, Chun-Mao Chiou
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Patent number: 11733291Abstract: The present application discloses a chip socket for testing a semiconductor chip. The chip socket includes a pedestal and a fastener. The pedestal accommodates a chip to be tested. The fastener includes a top body and a base body. The top body includes a probing window, wherein a first opening area of the probing window at an outer surface of the top body is larger than a second opening area of the probing window at an inner surface of the top body. The base body is attached to the pedestal and locked to the top body when the top body covers the base body and clamps the chip. When the top body covers the base body, the probing window reveals a surface of the chip, allowing a probe to contact the surface of the chip through the probing window.Type: GrantFiled: June 8, 2022Date of Patent: August 22, 2023Assignee: NANYA TECHNOLOGY CORPORATIONInventor: Yi-Kai Chao
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Publication number: 20220165844Abstract: A semiconductor device includes a substrate having a logic region and a high-voltage (HV) region, a first gate structure on the HV region, a first epitaxial layer and a second epitaxial layer adjacent to one side of the first gate structure, a first contact plug between the first epitaxial layer and the second epitaxial layer, a third epitaxial layer and a fourth epitaxial layer adjacent to another side of the first gate structure, and a second contact plug between the third epitaxial layer and the fourth epitaxial layer. Preferably, a bottom surface of the first epitaxial layer is lower than a bottom surface of the first contact plug and a bottom surface of the third epitaxial layer is lower than a bottom surface of the second contact plug.Type: ApplicationFiled: February 14, 2022Publication date: May 26, 2022Applicant: UNITED MICROELECTRONICS CORP.Inventors: Cheng-Pu Chiu, Tzung-Ying Lee, Dien-Yang Lu, Chun-Kai Chao, Chun-Mao Chiou
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Patent number: 11289572Abstract: A semiconductor device includes a substrate having a logic region and a high-voltage (HV) region, a first gate structure on the HV region, a first epitaxial layer and a second epitaxial layer adjacent to one side of the first gate structure, a first contact plug between the first epitaxial layer and the second epitaxial layer, a third epitaxial layer and a fourth epitaxial layer adjacent to another side of the first gate structure, and a second contact plug between the third epitaxial layer and the fourth epitaxial layer. Preferably, a bottom surface of the first epitaxial layer is lower than a bottom surface of the first contact plug and a bottom surface of the third epitaxial layer is lower than a bottom surface of the second contact plug.Type: GrantFiled: November 23, 2020Date of Patent: March 29, 2022Assignee: UNITED MICROELECTRONICS CORP.Inventors: Cheng-Pu Chiu, Tzung-Ying Lee, Dien-Yang Lu, Chun-Kai Chao, Chun-Mao Chiou
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Publication number: 20220032049Abstract: A microneedle electroporation device is provided, including a housing, a positioning member, an intermediate plate, a first microneedle assembly, a second microneedle assembly, a socket, a first wire, and a second wire. The positioning member is connected to the housing and the intermediate plate. The intermediate plate includes a plurality of first holes and a plurality of second holes. The first microneedle assembly includes a plurality of first microneedles and a first metal connecting portion connected to the first microneedles. The first microneedles pass through the first holes. The second microneedle assembly includes a plurality of second microneedles and a second metal connecting portion connected to the second microneedles. The second microneedles pass through the second holes. The first microneedle assembly and the second microneedle assembly are electrically independent of each other. The first wire connects the socket to the first metal connecting portion.Type: ApplicationFiled: June 29, 2021Publication date: February 3, 2022Inventors: Bo-Kai CHAO, Ying-Hao WANG, Jui-Hung TSAI, Chih-Hao HSU
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Publication number: 20220012046Abstract: An OS-independent peripheral plug-and-play and driver update method for embedded system and firmware data transmission method for embedded system platform is provided. The method includes: determining whether a peripheral device is connected to the embedded system host; when the peripheral device is connected to the embedded system host, acquire the ID of the peripheral device; connecting to a firmware server; according to the ID, acquiring a driver; packing the driver into a firmware and transmitting to the embedded system host; and performing a firmware update.Type: ApplicationFiled: November 25, 2020Publication date: January 13, 2022Inventors: Kung-Wang LEE, Kai-Chao YANG
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Patent number: 11209371Abstract: An optical detecting device includes an image capturing device and a processor. The processor is coupled to a light source and an image capturing device. The processor is configured to adjust a light intensity of the light source for irradiating a correction object in order that a gray value of at least one image block, captured by the image capturing device, of the correction object matches a target correction value, and record a target light intensity while the target light intensity matches the target correction value; control the light source to irradiate light on a testing object with the target light intensity, and control the image capturing device to capture a testing object image of the testing object; and calculate ratios of a target gray value to the gray value of a plurality of pixels of the testing object image to obtain a mapping table.Type: GrantFiled: November 19, 2019Date of Patent: December 28, 2021Assignee: CHROMA ATE INC.Inventors: Yu-Hsin Liu, Kai-Chao Chan, Ming-Kai Hsueh
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Publication number: 20200191724Abstract: An optical detecting device includes an image capturing device and a processor. The processor is coupled to a light source and an image capturing device. The processor is configured to adjust a light intensity of the light source for irradiating a correction object in order that a gray value of at least one image block, captured by the image capturing device, of the correction object matches a target correction value, and record a target light intensity while the target light intensity matches the target correction value; control the light source to irradiate light on a testing object with the target light intensity, and control the image capturing device to capture a testing object image of the testing object; and calculate ratios of a target gray value to the gray value of a plurality of pixels of the testing object image to obtain a mapping table.Type: ApplicationFiled: November 19, 2019Publication date: June 18, 2020Inventors: Yu-Hsin LIU, Kai-Chao CHAN, Ming-Kai HSUEH
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Patent number: 10455739Abstract: A high-frequency connecting device includes a housing, a sandwiched member, an inner heat sink, a rear heat sink, a heat pipe, a upper heat sink and a connector. The inner heat sink is disposed inside the sandwiched member. The top and the bottom of the inner heat sink respectively have a first contact portion and a second contact portion. The upper heat sink has a third contact portion. A fourth contact portion is elastically disposed on the lower cover. The first and the second optical modules are respectively inserted into the upper and the lower spaces. The top and the bottom of the first optical module are in direct contact respectively with the third contact portion and the first contact portion, while the top and the bottom of the second optical module are in direct contact respectively with the second contact portion and the fourth contact portion.Type: GrantFiled: June 1, 2018Date of Patent: October 22, 2019Assignee: NEXTRONICS ENGINEERING CORP.Inventors: Hou-An Su, Chang-Kai Chao
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Patent number: 10395260Abstract: A system and method for the federation of content items of a social network based on personalized relevance includes obtaining content items from first and second content item sources. Profile data for a member of the social network is obtained from the electronic data storage. A relevance score of the content item to the profile data of the member is determined for each of the content items. A utility value is determined based on the selection value, the value metric for content items from the first content item source, and the relevance score. A user device associated with the member displays the content items based on their respective utility values.Type: GrantFiled: February 27, 2015Date of Patent: August 27, 2019Assignee: Microsoft Technology Licensing, LLCInventors: Joshua Daniel Hartman, Kai Chao, Anuj Goyal
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Publication number: 20190215989Abstract: A high-frequency connecting device includes a housing, a sandwiched member, an inner heat sink, a rear heat sink, a heat pipe, a upper heat sink and a connector. The inner heat sink is disposed inside the sandwiched member. The top and the bottom of the inner heat sink respectively have a first contact portion and a second contact portion. The upper heat sink has a third contact portion. A fourth contact portion is elastically disposed on the lower cover. The first and the second optical modules are respectively inserted into the upper and the lower spaces. The top and the bottom of the first optical module are in direct contact respectively with the third contact portion and the first contact portion, while the top and the bottom of the second optical module are in direct contact respectively with the second contact portion and the fourth contact portion.Type: ApplicationFiled: June 1, 2018Publication date: July 11, 2019Inventors: Hou-An Su, Chang-Kai Chao
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Patent number: 10236796Abstract: A single hybrid motor of the present invention has a rotor, a first stator, a first torsional vibrator, a first longitudinal vibrator, a first template, and a first connecting element. One end of the first connecting element is connected with the rotor, the first torsional vibrator, the first longitudinal vibrator, the first template, the first elastic block and the second elastic block. The first elastic block is disposed between the rotor and the first torsional vibrator. The second elastic block is disposed between the first template and the first longitudinal vibrator. Adjusting the length of the first elastic block or/and the second elastic block allows the first torsional vibrator and the first longitudinal vibrator of the single hybrid motor to obtain a plurality of sets of resonance frequencies within a degeneracy range.Type: GrantFiled: May 9, 2016Date of Patent: March 19, 2019Assignee: CHUNG-YUAN CHRISTIAN UNIVERSITYInventors: Yung Ting, Sheuan-Perng Lin, Kai-Chao Chang, Jia-Ci Chen
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Publication number: 20170063258Abstract: A single hybrid motor of the present invention has a rotor, a first stator, a first torsional vibrator, a first longitudinal vibrator, a first template, and a first connecting element. One end of the first connecting element is connected with the rotor, the first torsional vibrator, the first longitudinal vibrator, the first template, the first elastic block and the second elastic block. The first elastic block is disposed between the rotor and the first torsional vibrator. The second elastic block is disposed between the first template and the first longitudinal vibrator. Adjusting the length of the first elastic block or/and the second elastic block allows the first torsional vibrator and the first longitudinal vibrator of the single hybrid motor to obtain a plurality of sets of resonance frequencies within a degeneracy range.Type: ApplicationFiled: May 9, 2016Publication date: March 2, 2017Inventors: YUNG TING, SHEUAN-PERNG LIN, KAI-CHAO CHANG, JIA-CI CHEN