Abstract: In some embodiments, a system for quantum key distribution, includes a plurality of n devices pairwise connected by an optical network, where n is an integer greater than or equal to 2. The optical network comprises a set of n(n?1) channels. The system employs wavelength-multiplexing, wavelength-demultiplexing, and time-multiplexing to provide a secure quantum key between two devices.

Abstract: A resin compound has a structure represented by a chemical formula (I): In the chemical formula (I), each R1 independently represents a C1-C20 alkylene group or a C7-C40 alkylarylene group, and R1 are the same or different from each other; n independently represents an integer of 1-4; each R2 independently represents a C1-C20 alkyl group or a C2-C20 terminal alkenyl group, and R2 are the same or different from each other. When at least one of R1 represents a C1-C20 alkylene group, at least one of R2 is a C2-C20 terminal alkenyl group.

Abstract: Disclosed herein are embodiments related to a power efficient multi-bit storage system. In one configuration, the multi-bit storage system includes a first storage circuit, a second storage circuit, a prediction circuit, and a clock gating circuit. In one aspect, the first storage circuit updates a first output bit according to a first input bit, in response to a trigger signal, and the second storage circuit updates a second output bit according to a second input bit, in response to the trigger signal. In one aspect, the prediction circuit generates a trigger enable signal indicating whether at least one of the first output bit or the second output bit is predicted to change a state. In one aspect, the clock gating circuit generates the trigger signal based on the trigger enable signal.

Abstract: A porous carrier including a cellulose substrate and a functional layer is provided. The functional layer is located on at least one surface of the cellulose substrate, wherein the functional layer includes an organic polymer elastic filler and a polymer binder. An electrochemical device separator including the porous carrier is also provided.

Abstract: The present disclosure provides a semiconductor device which includes a multiplexer, a master latch, and a slave latch. The multiplexer outputs an inverse of an input data signal or an inverse scan input signal according to a scan enable signal. The master latch is coupled to an output terminal of the multiplexer, and is configured to latch the inverse of the input data signal based on an input clock signal in response to the scan enable signal being in a low-logic state. The slave latch is coupled to the output terminal of the multiplexer through a first clocked CMOS inverter, and is configured to receive the input data signal and to output a latched slave latch data based on the input clock signal. A leakage-free dummy cell is disposed in a non-critical path of the master latch and the slave latch.

Abstract: Disclosed herein are embodiments related to a power efficient multi-bit storage system. In one configuration, the multi-bit storage system includes a first storage circuit, a second storage circuit, a prediction circuit, and a clock gating circuit. In one aspect, the first storage circuit updates a first output bit according to a first input bit, in response to a trigger signal, and the second storage circuit updates a second output bit according to a second input bit, in response to the trigger signal. In one aspect, the prediction circuit generates a trigger enable signal indicating whether at least one of the first output bit or the second output bit is predicted to change a state. In one aspect, the clock gating circuit generates the trigger signal based on the trigger enable signal.

Abstract: Systems and methods for non-contact characterization of semiconductor devices. Systems may include: an infrared radiation source directing radiation towards the semiconductor device; a radiation directing device positioned proximal the infrared radiation source to direct radiation towards an opposing side of the semiconductor device, the semiconductor device receivable between the radiation directing device and the infrared radiation source; and a radiation detector proximal to the infrared radiation source to sense radiation associated with a plurality of infrared wavebands from the semiconductor device for determining a dopant profile property of the semiconductor device. The sensed radiation may include radiation originating from the infrared radiation source reflected from the semiconductor device. The sensed radiation may include radiation originating from the radiation directing device and emerging from the semiconductor device.

Abstract: The present disclosure provides a semiconductor device which includes a multiplexer, a master latch, and a slave latch. The multiplexer outputs an inverse of an input data signal or an inverse scan input signal according to a scan enable signal. The master latch is coupled to an output terminal of the multiplexer, and is configured to latch the inverse of the input data signal based on an input clock signal in response to the scan enable signal being in a low-logic state. The slave latch is coupled to the output terminal of the multiplexer through a first clocked CMOS inverter, and is configured to receive the input data signal and to output a latched slave latch data based on the input clock signal. A leakage-free dummy cell is disposed in a non-critical path of the master latch and the slave latch.

Abstract: Techniques for safe non-conservative planning include: obtaining a risk budget constraining a plan for an autonomous vehicle to satisfy an objective; based at least on the risk budget and the objective, planning a trajectory of the autonomous vehicle toward the objective, at least by: (a) determining a risk cost associated with an initial planned action of the trajectory, (b) based at least on the risk cost, determining whether the trajectory is feasible or infeasible within the risk budget, and (c) responsive to determining that the trajectory is feasible within the risk budget, executing the initial planned action; decreasing the risk budget by the risk cost, to obtain a remaining risk budget; obtaining state data corresponding to a state of the autonomous vehicle after executing the initial planned action; and based at least on the state data, the remaining risk budget, and the objective, planning another trajectory toward the objective.

Abstract: An integrated circuit (IC) with active and dummy device cell arrays and a method of fabricating the same are discloses. The IC includes a substrate, an active device cell, and a dummy device cell. The active device cell includes an array of source/drain (S/D) regions of a first conductivity type disposed on or within the substrate and an array of gate structures with a first gate fill material disposed on the substrate. The dummy device cell includes a first array of S/D regions of the first conductivity type disposed on or within the substrate, a second array of S/D regions of a second conductivity type disposed on or within the substrate, and an array of dual gate structures disposed on the substrate. Each of the dual gate structures includes the first gate fill material and a second gate fill material that is different from the first gate fill material.

Abstract: A semiconductor structure including a substrate, a first well region, a second well region, an isolation, a gate structure, and a dielectric layer is provided. The first well region is disposed in the substrate, wherein a dopant of the first well region includes arsenic. The second well region is disposed in the substrate under the first well region, wherein the second well region has a conductivity type different from that of the first doping region. The isolation is disposed in the substrate and surrounds the first well region, wherein a depth of the isolation is substantially greater than or equal to a depth of the first well region from a first surface of the substrate. The gate structure are disposed sequentially over the substrate and overlaps the first well region. A method of forming the semiconductor structure is also provided.

Abstract: A circuit includes a first power node having a first voltage level, a second power node having a second voltage level different from the first voltage level, a reference node having a reference voltage level, a master latch that outputs a first bit based on a received bit, a slave latch that outputs a second bit based on the first bit and an output bit based on a selected one of the first bit or a third bit, a first level shifter that outputs the third bit based on a complementary bit pair, and a retention latch including a second level shifter and a pair of inverters that outputs the complementary bit pair based on the second bit. The slave latch and the first level shifter are coupled between the first power and reference nodes, and the retention latch is coupled between the second power and reference nodes.

Abstract: An integrated circuit (IC) with active and dummy device cell arrays and a method of fabricating the same are discloses. The IC includes a substrate, an active device cell, and a dummy device cell. The active device cell includes an array of source/drain (S/D) regions of a first conductivity type disposed on or within the substrate and an array of gate structures with a first gate fill material disposed on the substrate. The dummy device cell includes a first array of S/D regions of the first conductivity type disposed on or within the substrate, a second array of S/D regions of a second conductivity type disposed on or within the substrate, and an array of dual gate structures disposed on the substrate. Each of the dual gate structures includes the first gate fill material and a second gate fill material that is different from the first gate fill material.

Abstract: A curable composition and an electronic device employing the same are provided. The curable composition includes 100 parts by mole of a first siloxane compound represented by Formula (I) wherein n is 8 to 232, wherein R1 is independently C1-3 alkyl group; 1 to 15 parts by mole of a second siloxane compound represented by Formula (II) wherein x?2, y?2, and x/y is between 0.1 and 3, and R2, R3 and R4 are independently C1-3 alkyl group; 1 to 15 parts by mole of a third siloxane compound represented by Formula (III) and 90 to 250 parts by mole of a curing agent represented by Formula (IV) wherein m is 7 to 230, wherein R5 is independently C1-3 alkyl group.

Abstract: A circuit includes first and second power nodes having differing first and second voltage levels, and a reference node having a reference voltage level. A master latch outputs a first data bit based on a received data bit; a slave latch includes a first inverter that outputs a second data bit based on the first data bit and a second inverter that outputs an output data bit based on a selected one of the first data bit or a third data bit; a level shifter outputs the third data bit based on a fourth data bit; and a retention latch outputs the fourth data bit based on the second data bit. The first and second inverters and the level shifter are coupled between the first power node and the reference node, and the retention latch includes a plurality of transistors coupled between the second power node and the reference node.

Abstract: An epoxy compound, composition and cured product thereof are provided. The epoxy compound has a structure represented by Formula (I) wherein R1 and R2 are each independently cyano group, isocyanate group, oxiranyl, methyloxiranyl group, glycidyl group, methylglycidyl group, epoxypropyl group, oxetanyl group, oxetanemethyl group, or C1-C10 alkoxy group; Z is —O—, R3 and R4 are each independently hydrogen, fluorine, methyl, fluoromethyl, or ethyl; n and m are each independently 3, 4, 5, 6, 7, 8, 9, or 10; and i and j are each independently 1, 2, or 3.

Abstract: A resin composition and a resin film are provided. The resin composition includes a hardener and an epoxy resin monomer. The epoxy resin monomer has a structure represented by Formula (I) wherein A is substituted or unsubstituted C6-24 arylene group, C3-16 cycloalkylene group, C3-16 heteroarylene group, C3-16 alicyclic alkylene group, or divalent C6-25 alkylaryl group; X1 and X2 are independently Y1 and Y2 are independently substituted or unsubstituted C6-24 arylene group, and Y1 is different from Y2; and R1 is hydrogen, C1-8 alkyl group, or C1-8 alkoxy group, wherein the weight ratio of the curing agent to the epoxy resin monomer having a structure represented by Formula (I) is from 1:100 to 1:1.

Abstract: A resin compound has a structure represented by a chemical formula (I): In the chemical formula (I), each R1 independently represents a C1-C20 alkylene group or a C7-C40 alkylarylene group, and R1 are the same or different from each other; n independently represents an integer of 1-4; each R2 independently represents a C1-C20 alkyl group or a C2-C20 terminal alkenyl group, and R2 are the same or different from each other. When at least one of R1 represents a C1-C20 alkylene group, at least one of R2 is a C2-C20 terminal alkenyl group.

Abstract: A curable composition and an electronic device employing the same are provided. The curable composition includes 100 parts by mole of a first siloxane compound represented by Formula (I) wherein n is 8 to 232, wherein R1 is independently C1-3 alkyl group; 1 to 15 parts by mole of a second siloxane compound represented by Formula (II) wherein x?2, y?2, and x/y is between 0.1 and 3, and R2, R3 and R4 are independently C1-3 alkyl group; 1 to 15 parts by mole of a third siloxane compound represented by Formula (III) and 90 to 250 parts by mole of a curing agent represented by Formula (IV) wherein m is 7 to 230, wherein R5 is independently C1-3 alkyl group.

Abstract: A faucet aerator comprises: a casing and a guiding member. The casing has a water inlet 11 and a water outlet. The water inlet is provided with a threaded portion for engaging with a faucet. The casing is further provided with at least one ring groove at an inner surface for engaging with the guiding member. The guiding member has a barrel body with a pre-filter, and the pre-filter is provided with at least one ring rib for engaging with the ring groove when the guiding member is placed in the casing, to avoid the guiding member from escaping the casing while the aerator is cleaned. The barrel body provided with a plurality of through apertures, a bottom mesh, and a first aerating mesh.