Patents by Inventor Kai-Di Wu

Kai-Di Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10163849
    Abstract: A method of manufacturing a semiconductor structure, including receiving a first substrate including a plurality of conductive bumps disposed over the first substrate; receiving a second substrate; disposing an adhesive over the first substrate; removing a portion of the adhesive to expose at least one of the plurality of conductive bumps; and bonding the first substrate with the second substrate.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: December 25, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Alexander Kalnitsky, Yi-Yang Lei, Hsi-Ching Wang, Cheng-Yu Kuo, Tsung Lung Huang, Ching-Hua Hsieh, Chung-Shi Liu, Chen-Hua Yu, Chin-Yu Ku, De-Dui Liao, Kuo-Chio Liu, Kai-Di Wu, Kuo-Pin Chang, Sheng-Pin Yang, Isaac Huang
  • Publication number: 20180047701
    Abstract: A method of manufacturing a semiconductor structure, including receiving a first substrate including a plurality of conductive bumps disposed over the first substrate; receiving a second substrate; disposing an adhesive over the first substrate; removing a portion of the adhesive to expose at least one of the plurality of conductive bumps; and bonding the first substrate with the second substrate.
    Type: Application
    Filed: October 23, 2017
    Publication date: February 15, 2018
    Inventors: ALEXANDER KALNITSKY, YI-YANG LEI, HSI-CHING WANG, CHENG-YU KUO, TSUNG LUNG HUANG, CHING-HUA HSIEH, CHUNG-SHI LIU, CHEN-HUA YU, CHIN-YU KU, DE-DUI LIAO, KUO-CHIO LIU, KAI-DI WU, KUO-PIN CHANG, SHENG-PIN YANG, ISAAC HUANG
  • Patent number: 9799625
    Abstract: A method of manufacturing a semiconductor structure, comprising: receiving a first substrate including a first surface, a second surface opposite to the first surface and a plurality of conductive bumps disposed over the first surface; receiving a second substrate; disposing an adhesive over the first substrate or the second substrate; heating the adhesive in a first ambiance; bonding the first substrate with the second substrate by applying a force of less than about 10,000N upon the first substrate or the second substrate and heating the adhesive in a second ambiance; and thinning down a thickness of the first substrate from the second surface.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: October 24, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Alexander Kalnitsky, Yi-Yang Lei, Hsi-Ching Wang, Cheng-Yu Kuo, Tsung Lung Huang, Ching-Hua Hsieh, Chung-Shi Liu, Chen-Hua Yu, Chin-Yu Ku, De-Dui Liao, Kuo-Chio Liu, Kai-Di Wu, Kuo-Pin Chang, Sheng-Pin Yang, Isaac Huang
  • Publication number: 20160365332
    Abstract: A method of manufacturing a semiconductor structure, comprising: receiving a first substrate including a first surface, a second surface opposite to the first surface and a plurality of conductive bumps disposed over the first surface; receiving a second substrate; disposing an adhesive over the first substrate or the second substrate; heating the adhesive in a first ambiance; bonding the first substrate with the second substrate by applying a force of less than about 10,000N upon the first substrate or the second substrate and heating the adhesive in a second ambiance; and thinning down a thickness of the first substrate from the second surface.
    Type: Application
    Filed: June 12, 2015
    Publication date: December 15, 2016
    Inventors: ALEXANDER KALNITSKY, YI-YANG LEI, HSI-CHING WANG, CHENG-YU KUO, TSUNG LUNG HUANG, CHING-HUA HSIEH, CHUNG-SHI LIU, CHEN-HUA YU, CHIN-YU KU, DE-DUI LIAO, KUO-CHIO LIU, KAI-DI WU, KUO-PIN CHANG, SHENG-PIN YANG, ISAAC HUANG
  • Patent number: 8565288
    Abstract: A method for performing delay locked looping upon a received signal which reduces the asymmetry of auto-correlation function resulting from sampling is provided. The received signal is a spread spectrum code signal, and the method includes: generating a plurality of replica spread spectrum code signals according to an estimated code phase delay and phase spacing, the replica spread spectrum code signals having phases respectively different from the phase of the received signal; calculating a spread spectrum code error statistics signal according to the replica spread spectrum code signals and the received signal; and adjusting the estimated code phase delay according to the spread spectrum code error statistics signal and a phase difference between a sampled point of at least one replica spread spectrum code signal and a corresponding signal transition point.
    Type: Grant
    Filed: March 6, 2011
    Date of Patent: October 22, 2013
    Assignee: Realtek Semiconductor Corp.
    Inventors: Kai-Di Wu, Kun-Sui Hou
  • Publication number: 20110216812
    Abstract: A method for performing delay locked looping upon a received signal which reduces the asymmetry of auto-correlation function resulting from sampling is provided. The received signal is a spread spectrum code signal, and the method includes: generating a plurality of replica spread spectrum code signals according to an estimated code phase delay and phase spacing, the replica spread spectrum code signals having phases respectively different from the phase of the received signal; calculating a spread spectrum code error statistics signal according to the replica spread spectrum code signals and the received signal; and adjusting the estimated code phase delay according to the spread spectrum code error statistics signal and a phase difference between a sampled point of at least one replica spread spectrum code signal and a corresponding signal transition point.
    Type: Application
    Filed: March 6, 2011
    Publication date: September 8, 2011
    Inventors: Kai-Di Wu, Kun-Sui Hou