Patents by Inventor Kai Feng
Kai Feng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11973930Abstract: A new real-time video communication system includes a set of electronic devices. Each device runs a specialized real-time video communication software application including a video quality module. The video quality module retrieves network connection statistic data from a network connection module, and video encoder statistic data from a video quality module. The video quality module uses the network connection statistic data and the video encoder statistic data to determine a first objective video quality measure without extensive mathematical operations. The video quality module also uses the first objective video quality measure, the network connection statistic data and the video encoder statistic data to determine a second objective quality measure without extensive mathematical operations.Type: GrantFiled: February 21, 2022Date of Patent: April 30, 2024Assignee: Agora Lab, Inc.Inventors: Xiaoran Wu, Tianbo Chen, Kai Wang, Lin Feng
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Patent number: 11972557Abstract: Provided are a vibration object monitoring method and apparatus, a computer device, and a storage medium. The method includes: in response to detecting that a vibration object exists in a monitoring video picture for a target monitoring region, a vibration object region in the monitoring video picture is determined, where the vibration object region is a region where the vibration object is located in the monitoring video picture; displacement information of a key point of the vibration object in the vibration object region is recorded; vibration information of the vibration object in the monitoring video picture is determined based on the displacement information; and a vibration object monitoring result for the target monitoring region is generated according to the vibration information. The abnormal vibration monitoring can be performed on the vibration object in the target monitoring region in time according to this method.Type: GrantFiled: March 8, 2021Date of Patent: April 30, 2024Assignee: CSG POWER GENERATION CO., LTD.Inventors: Yumin Peng, Zhiqiang Wang, Hao Zhang, Hengjun Chen, Xun Hu, Tuixiang Feng, Liqun Sun, Man Chen, Yong Lu, Tao Liu, Kai Lin, Yulin Han
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Publication number: 20240131819Abstract: A thermally conductive board includes a first metal layer, a second metal layer, and a thermally conductive layer. The material of the first metal layer includes copper, and the first metal layer has a first top surface and a first bottom surface opposite to the first top surface. A first metal coating layer covers the first bottom surface. The material of the second metal layer includes copper, and the second metal layer has a second top surface and a second bottom surface opposite to the second top surface. A second metal coating layer covers the second top surface and faces the first metal coating layer. The thermally conductive layer is an electrically insulator laminated between the first metal coating layer and the second metal coating layer.Type: ApplicationFiled: May 3, 2023Publication date: April 25, 2024Inventors: KAI-WEI LO, WEN-FENG LEE, HSIANG-YUN YANG, KUO-HSUN CHEN
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Publication number: 20240137680Abstract: Provided is a wireless Bluetooth earphone, which belongs to the field of headphone technology. The wireless Bluetooth earphone comprises a housing, a circuit board, a battery, a connection ring, and a connection terminal. The housing comprises a main housing and a battery housing. The circuit board is arranged in the main housing. The connection ring has a first end and a second end. The first end is connected to one end of the main housing, that is, the first end is connected to one end of the rear housing arranged with an opening. The second end is detachably connected to the battery housing, and the battery is arranged in the battery housing. The connection terminal is arranged in the connection ring. One end of the connection terminal is electrically connected to the circuit board, and the other end of the connection terminal is electrically connected to the battery.Type: ApplicationFiled: December 1, 2022Publication date: April 25, 2024Applicant: LUXSHARE ELECTRONIC TECHNOLOGY (KUNSHAN) LTD.Inventors: Zhe FENG, Ji WEI, Qinghong ZHAO, Kai CHE, Linggang MENG
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Publication number: 20240128168Abstract: A QFN package includes a copper lead frame. The copper lead frame includes a die paddle. A die is fixed on the die pad. A coolant passage is disposed within the die paddle. An inlet passage connects to one end of the coolant passage. An outlet passage connects to another end of the coolant passage. A mold compound encapsulates the copper lead frame and the die.Type: ApplicationFiled: November 14, 2022Publication date: April 18, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chiu-Feng Lee, Chen-Hsiao Wang, Kai-Kuang Ho
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Publication number: 20240129653Abstract: An optical network unit is configured to send a plurality of optical signals with different wavelengths to an optical line terminal. The optical signals in the plurality of optical signals carry indicating information. The indicating information is used to indicate the wavelength serial number of the optical signal and the temperature information of the laser chip when the optical signal is generated. The optical unit is further configured to receive temperature adjustment information from the optical line terminal; and adjust, based on the temperature adjustment information, the emission wavelength of the laser by adjusting the temperature of the laser chip.Type: ApplicationFiled: October 18, 2023Publication date: April 18, 2024Applicant: Nokia Solutions and Networks OyInventors: Xiao Feng HU, Dong Xu ZHANG, Xiao An HUANG, Kai Bin ZHANG
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Patent number: 11961244Abstract: Disclosed is a high-precision dynamic real-time 360-degree omnidirectional point cloud acquisition method based on fringe projection. The method comprises: firstly, by means of the fringe projection technology based on a stereoscopic phase unwrapping method, and with the assistance of an adaptive dynamic depth constraint mechanism, acquiring high-precision three-dimensional (3D) data of an object in real time without any additional auxiliary fringe pattern; and then, after a two-dimensional (2D) matching points optimized by the means of corresponding 3D information is rapidly acquired, by means of a two-thread parallel mechanism, carrying out coarse registration based on Simultaneous Localization and Mapping (SLAM) technology and fine registration based on Iterative Closest Point (ICP) technology.Type: GrantFiled: August 27, 2020Date of Patent: April 16, 2024Assignee: NANJING UNIVERSITY OF SCIENCE AND TECHNOLOGYInventors: Chao Zuo, Jiaming Qian, Qian Chen, Shijie Feng, Tianyang Tao, Yan Hu, Wei Yin, Liang Zhang, Kai Liu, Shuaijie Wu, Mingzhu Xu, Jiaye Wang
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Publication number: 20240120306Abstract: A semiconductor package includes a die stack including a first semiconductor die having a first interconnect structure, and a second semiconductor die having a second interconnect structure direct bonding to the first interconnect structure of the first semiconductor die. The second interconnect structure includes connecting pads disposed in a peripheral region around the first semiconductor die. First connecting elements are disposed on the connecting pads, respectively. A substrate includes second connecting elements on a mounting surface of the substrate. The first connecting elements are electrically connected to the second connecting elements through an anisotropic conductive structure.Type: ApplicationFiled: November 4, 2022Publication date: April 11, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Kai-Kuang Ho, Yu-Jie Lin, Yi-Feng Hsu
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Publication number: 20240120316Abstract: The present disclosure relates to a semiconductor package, a semiconductor bonding structure and a method of fabricating the same. The semiconductor package includes a first chip, a second chip and a conductive structure, wherein the conductive structure is disposed at a side of the second chip and over a second upper surface of the first interconnection structure to electrically connect to the first interconnection structure. The semiconductor bonding structure includes a first substrate, a plurality of first interconnection structures, a plurality of chips and a plurality of conductive structures, wherein the conductive structures are respectively disposed at a side of each of the chips and over a second upper surface of each first interconnection structure, to electrically connect to each first interconnection.Type: ApplicationFiled: November 17, 2022Publication date: April 11, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Kai-Kuang Ho, Yu-Jie Lin, Yi-Feng Hsu
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Publication number: 20240120207Abstract: A semiconductor package includes a die having a plurality of devices over a first substrate, where the first substrate includes a dopant at a first concentration and the first substrate has a first width along a horizontal direction. The semiconductor package further includes a second substrate fused with the first substrate, where the second substrate includes the dopant at a second concentration greater than the first concentration.Type: ApplicationFiled: February 15, 2023Publication date: April 11, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Lung-Kai Mao, Wen-Hsiung Lu, Pei-Wei Lee, Szu-Hsien Lee, Chieh-Ning Feng
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Patent number: 11950780Abstract: A surgical instrument and a battery pack for use with the surgical instrument are disclosed. The surgical instrument includes a handle assembly, having a protruding portion; and a battery pack, detachably assembled on the handle assembly, operated by the protruding portion, and having a battery unit, where the battery pack includes a discharging system comprising a discharge element, and a switching member, operated to electrically connect the discharge element to the battery unit of the battery pack to form a discharge circuit, and having an initial open state, in which the discharge circuit is non-conductive, an intermediate open state, in which the switching member cooperates with the protruding portion to make the discharge circuit non-conductive, and a closed state, in which the switching member is separated from the protruding portion to make the discharge circuit conducting.Type: GrantFiled: March 22, 2022Date of Patent: April 9, 2024Assignee: REACH SURGICAL, INC.Inventors: Yu Li, Kai Wang, Rongxuan Feng
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Patent number: 11955579Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of light-emitting elements on a first substrate and forming a first pattern array on a second substrate, wherein the first pattern array includes an adhesive layer. The method also includes transferring the plurality of light-emitting elements from the first substrate to the second substrate and forming the first pattern array on a third substrate. The method includes transferring the plurality of light-emitting elements from the second substrate to the third substrate, and reducing an adhesion force of a portion of the adhesive layer. The method also includes forming a second pattern array on a fourth substrate, and transferring the plurality of light-emitting elements from the third substrate to the fourth substrate. The pitch between the plurality of light-emitting elements on the first substrate is different than the pitch of the first pattern array.Type: GrantFiled: April 21, 2022Date of Patent: April 9, 2024Assignee: INNOLUX CORPORATIONInventors: Kai Cheng, Tsau-Hua Hsieh, Fang-Ying Lin, Tung-Kai Liu, Hui-Chieh Wang, Chun-Hsien Lin, Jui-Feng Ko
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Patent number: 11955484Abstract: A semiconductor device includes a semiconductor substrate having a first region and a second region, insulators, gate stacks, and first and second S/Ds. The first and second regions respectively includes at least one first semiconductor fin and at least one second semiconductor fin. A width of a middle portion of the first semiconductor fin is equal to widths of end portions of the first semiconductor fin. A width of a middle portion of the second semiconductor fin is smaller than widths of end portions of the second semiconductor fin. The insulators are disposed on the semiconductor substrate. The first and second semiconductor fins are sandwiched by the insulators. The gate stacks are over a portion of the first semiconductor fin and a portion of the second semiconductor fin. The first and second S/Ds respectively covers another portion of the first semiconductor fin and another portion of the second semiconductor fin.Type: GrantFiled: June 10, 2022Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuan-Jung Chen, I-Chih Chen, Chih-Mu Huang, Kai-Di Wu, Ming-Feng Lee, Ting-Chun Kuan
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Publication number: 20240113032Abstract: Interconnect structure packages (e.g., through silicon vias (TSV) packages, through interlayer via (TIV) packages) may be pre-manufactured as opposed to forming TIVs directly on a carrier substrate during a manufacturing process for a semiconductor die package at backend packaging facility. The interconnect structure packages may be placed onto a carrier substrate during manufacturing of a semiconductor device package, and a semiconductor die package may be placed on the carrier substrate adjacent to the interconnect structure packages. A molding compound layer may be formed around and in between the interconnect structure packages and the semiconductor die package.Type: ApplicationFiled: April 25, 2023Publication date: April 4, 2024Inventors: Kai-Fung CHANG, Chin-Wei LIANG, Sheng-Feng WENG, Ming-Yu YEN, Cheyu LIU, Hung-Chih CHEN, Yi-Yang LEI, Ching-Hua HSIEH
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Patent number: 11949040Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of diodes on a first substrate and forming a first pattern array on a second substrate. The method also includes transferring the plurality of diodes from the first substrate to the second substrate. The method further includes forming the first pattern array on a third substrate. In addition, the method includes transferring the plurality of diodes from the second substrate to the third substrate. The method also includes forming a second pattern array on a fourth substrate. The method further includes transferring the plurality of diodes from the third substrate to the fourth substrate. The pitch between the plurality of diodes on the first substrate is different from the pitch of the first pattern array.Type: GrantFiled: April 21, 2022Date of Patent: April 2, 2024Assignee: INNOLUX CORPORATIONInventors: Kai Cheng, Tsau-Hua Hsieh, Fang-Ying Lin, Tung-Kai Liu, Hui-Chieh Wang, Chun-Hsien Lin, Jui-Feng Ko
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Patent number: 11947449Abstract: Embodiments of the present disclosure relate to a method, system and computer program product for semantic search based on a graph database. In some embodiments, a method is disclosed. According to the method, the user jobs of a user are obtained from a first software product. Based on the user jobs, target test cases are selected from a plurality of test cases associated with the first software product and a second software product. The target test cases are applied to the first software product and the second software product, and in accordance with a determination that a result of applying the target test cases satisfies a predetermined criterion, an instruction is provided to indicate migrating from the first software product to the second software product. In other embodiments, a system and a computer program product are disclosed.Type: GrantFiled: July 7, 2022Date of Patent: April 2, 2024Assignee: International Business Machines CorporationInventors: Lei Gao, Jin Wang, A Peng Zhang, Kai Li, Jun Wang, Jing James Xu, Rui Wang, Xin Feng Zhu
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Patent number: 11937932Abstract: An acute kidney injury predicting system and a method thereof are proposed. A processor reads the data to be tested, the detection data, the machine learning algorithm and the risk probability comparison table from a main memory. The processor trains the detection data according to the machine learning algorithm to generate an acute kidney injury prediction model, and inputs the data to be tested into the acute kidney injury prediction model to generate an acute kidney injury characteristic risk probability and a data sequence table. The data sequence table lists the data to be tested in sequence according to a proportion of each of the data to be tested in the acute kidney injury characteristics. The processor selects one of the medical treatment data from the risk probability comparison table according to the acute kidney injury characteristic risk probability.Type: GrantFiled: July 8, 2022Date of Patent: March 26, 2024Assignees: TAICHUNG VETERANS GENERAL HOSPITAL, TUNGHAI UNIVERSITYInventors: Chieh-Liang Wu, Chun-Te Huang, Cheng-Hsu Chen, Tsai-Jung Wang, Kai-Chih Pai, Chun-Ming Lai, Min-Shian Wang, Ruey-Kai Sheu, Lun-Chi Chen, Yan-Nan Lin, Chien-Lun Liao, Ta-Chun Hung, Chien-Chung Huang, Chia-Tien Hsu, Shang-Feng Tsai
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Patent number: 11936056Abstract: A battery module, a battery pack, and a vehicle are described in this patent application. In the battery module, a plurality of grooves separated by partition parts are disposed in a module casing, a plurality of jelly rolls of the battery module are embedded in the grooves, and a top cover covers an opening of each groove to seal the groove as an independent mounting cavity. In this way, each groove wall in the module casing and the top cover may be used as a housing for sealing each jelly roll, to avoid a case in which an electrolyte in each jelly roll decomposes and produces gas in a process of using the battery module because the electrolyte is leaked from one jelly roll to another jelly roll.Type: GrantFiled: December 7, 2021Date of Patent: March 19, 2024Assignee: HUAWEI DIGITAL POWER TECHNOLOGIES CO., LTD.Inventors: Guanghui Zhang, Zhen Qin, Kai Feng
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Publication number: 20240086730Abstract: At least one processor identifies dependency relationships among libraries in a repository of libraries. Using the dependency relationships among libraries, at least one machine learning model can be created that predicts with a confidence value a dependency between a given library and a target library. An L layer tree-like graph can be created, using the dependency relationships among libraries and an application package. L can be configurable. Versions of the libraries to use can be determined by running the at least one machine learning model for each pair of nodes having a dependency relationship in the L layer tree-like graph, the at least one machine learning model identifying the dependency relationship with a confidence value, where pairs of nodes having largest confidence values are selected as the versions of the libraries to use in the application package.Type: ApplicationFiled: September 13, 2022Publication date: March 14, 2024Inventors: Jin Wang, Lei Gao, A Peng Zhang, Kai Li, Xin Feng Zhu, Geng Wu Yang, Jia Xing Tang, Yan Liu
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Patent number: 11927780Abstract: A dielectric grating apparatus comprises a substrate; a grating layer, disposed above the substrate; a first interference layer, disposed above the substrate; and a second interference layer, adjacent to the first interference layer, wherein a refractive index of a material of the second interference layer is greater than a refractive index of a material of the first interference layer.Type: GrantFiled: May 31, 2022Date of Patent: March 12, 2024Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Jian-Hung Lin, Chiang-Hsin Lin, Po-Tse Tai, Tsong-Dong Wang, Bo-Kai Feng