Patents by Inventor Kai-Hsin Chuang
Kai-Hsin Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250141677Abstract: A key storage device and a method for writing a key value into an one-time-programmable (OTP) device are provided. The key storage device includes an energy harvester, a controller, a hardware key device and the OTP device. The energy harvester is configured to collect energy particles during a fabrication process of a wafer which includes the key storage device, in order to generate a regular voltage. The controller is configured to enable a key transfer procedure when the regular voltage reaches a predetermine level. The hardware key device is configured to provide a pre-existing key value. The controller reads the pre-existing key value from the hardware key device, and writes a key value into the OTP device according to the pre-existing key value. After the OTP device stores the key value, the controller erases the pre-existing key value within the hardware key device.Type: ApplicationFiled: July 11, 2024Publication date: May 1, 2025Applicant: PUFsecurity CorporationInventor: Kai-Hsin Chuang
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Patent number: 12288000Abstract: An electronic device includes a processor, a memory, and at least one program. The at least one program are stored in the memory and are executed by the processor. The at least one program includes instructions for receiving the sequence of bits, dividing the sequence of bits into binary numbers having a same number of bits, determining a corresponding point for each binary number on a circumference of a circle according to a central angle positively correlated to a value of each binary numbers, plotting chords connecting corresponding points of two succeeding binary numbers in the circle in the display image, and displaying the display image to show a brightness of each chord correlated to a number of times the chord is plotted, wherein the brightness of each chord forms a brightness distribution signifying an entropy of the first sequence of bits.Type: GrantFiled: May 16, 2024Date of Patent: April 29, 2025Assignee: PUFSECURITY CORPORATIONInventors: Tsung-Han Hsieh, Kai-Hsin Chuang
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Publication number: 20250085913Abstract: An electronic device includes a processor, a memory, and at least one program. The at least one program are stored in the memory and are executed by the processor. The at least one program includes instructions for receiving the sequence of bits, dividing the sequence of bits into binary numbers having a same number of bits, determining a corresponding point for each binary number on a circumference of a circle according to a central angle positively correlated to a value of each binary numbers, plotting chords connecting corresponding points of two succeeding binary numbers in the circle in the display image, and displaying the display image to show a brightness of each chord correlated to a number of times the chord is plotted, wherein the brightness of each chord forms a brightness distribution signifying an entropy of the first sequence of bits.Type: ApplicationFiled: May 16, 2024Publication date: March 13, 2025Inventors: TSUNG-HAN HSIEH, KAI-HSIN CHUANG
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Publication number: 20240220669Abstract: An anti-tampering detector and a method for detecting a physical attack are provided, wherein the anti-tampering detector includes a temperature sensor, a voltage detector, a frequency detector and a controller. The temperature sensor is configured to generate a temperature code according to an operation temperature. The voltage detector is configured to generate a voltage code according to a supply voltage and the temperature code. The frequency detector is configured to generate a frequency code according to a system clock, the temperature code and the voltage code. The controller is configured to generate an anti-tampering detection result according to the temperature code, the voltage code and the frequency code. The anti-tampering detection result indicates whether any of the operation temperature, the supply voltage and the system clock is tampered with due to the physical attack.Type: ApplicationFiled: July 10, 2023Publication date: July 4, 2024Applicant: PUFsecurity CorporationInventors: Kai-Hsin Chuang, Chi-Yi Shao, Chun-Heng You
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Patent number: 11961567Abstract: A key storage device comprising a first key unit and a second key unit is disclosed. The first key unit is configured to output a first logic value through, comprising: a first setting circuit configured to output a first setting voltage; and a first inverter comprising a first output transistor having a first threshold voltage, configured to receive the first setting voltage and generate the first logic value. The second key unit is configured to output a second logic value through a second node, comprising: a second setting circuit configured to output a second setting voltage; and a second inverter comprising a second output transistor having a second threshold voltage, configured to receive the second setting voltage and generate the second logic value. The absolute value of first threshold voltage is lower than which of the second threshold voltage. The first setting voltage is higher than the second setting voltage.Type: GrantFiled: June 24, 2022Date of Patent: April 16, 2024Assignee: PUFsecurity CorporationInventors: Kai-Hsin Chuang, Chi-Yi Shao, Chun-Heng You
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Publication number: 20240072776Abstract: An entropy source circuit, comprising: a first adjustable ring oscillator for operating under a first setting or a second setting according to a first control signal, for respectively generating a first oscillation clock signal and a second oscillation clock signal which have different frequencies under the first setting and the second setting; a first sampling circuit, for sampling the first oscillating clock signal according to the sampling frequency to generate first sampling values, or sampling the second oscillating clock signal according to the sampling frequency to generate second sampling values; a first detection circuit detecting a first distribution of the first sampling values; and a control circuit generating the first control signal to switch the first setting to the second setting when the first distribution does not meet a predetermined distribution. The entropy source circuit outputs entropy values according to the first sample value or the second sample value.Type: ApplicationFiled: July 6, 2023Publication date: February 29, 2024Applicant: PUFsecurity CorporationInventors: Chi-Yi Shao, Kai-Hsin Chuang, Meng-Yi Wu
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Publication number: 20240045656Abstract: A method for generating random numbers for gaming based on a blockchain network is provided, which includes generating and broadcasting a random number request packet to the blockchain network by a game server of the blockchain network in response to occurrence of a random event in gaming, generating a plurality of random numbers by a plurality of random number supplier nodes of the blockchain network in response to receiving the random number request packet, determining if the respective generated random number conforms to a selection criterion by the plurality of random number supplier nodes, adding an added block corresponding to a first valid random number to the blockchain network by one of the random number supplier nodes and obtaining a target random number corresponding to the added block by the game server.Type: ApplicationFiled: July 28, 2023Publication date: February 8, 2024Applicant: PUFsecurity CorporationInventors: Kai-Hsin Chuang, Yu-Hsin Wang
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Patent number: 11893141Abstract: A method and a control circuit for managing information of an electronic device are provided, where the electronic device includes the control chip. The method includes: utilizing a static entropy source of the control circuit to provide static entropy data; utilizing a cryptographic circuit of the control circuit to generate a public key and a private key according to the static entropy data, where the public key is to be registered into a blockchain by an identifier (ID) management device; and utilizing a signature generating circuit to generate a digital signature at least according to the private key, where the information of the electronic device is to be uploaded to the blockchain in conjunction with the digital signature.Type: GrantFiled: December 6, 2021Date of Patent: February 6, 2024Assignee: PUFsecurity CorporationInventor: Kai-Hsin Chuang
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Patent number: 11870444Abstract: An entropy source circuit is provided. The entropy source circuit includes a digital circuit, a determination circuit and a time-to-digital converter (TDC), wherein the determination circuit is coupled to the digital circuit, and the TDC is coupled to the determination circuit. The digital circuit is configured to generate result data at a second time point according to input data received at a first time point, and the determination circuit is configured to perform determination on reference data with dynamic output generated by the digital circuit, to generate a determination result, wherein the reference data is equal to the result data. In addition, the TDC is configured to perform a time-to-digital conversion on a delay of the digital circuit for generating the result data according to the input data with aid of the determination signal, in order to generate entropy data corresponding to the delay.Type: GrantFiled: January 17, 2023Date of Patent: January 9, 2024Assignee: PUFsecurity CorporationInventors: Chun-Heng You, Kai-Hsin Chuang, Chi-Yi Shao
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Patent number: 11782090Abstract: A built-in self-test (BIST) circuit and a BIST method for Physical Unclonable Function (PUF) quality check are provided. The BIST circuit may include a PUF array, a readout circuit coupled to the PUF array, and a first comparing circuit coupled to the readout circuit. The PUF array may include a plurality of PUF units, wherein each of the PUF units includes a first cell and a second cell. The readout circuit may be configured to output an output bit from the first cell and output a parity bit from the second cell. The first comparing circuit may be configured to compare an output string with a parity string to generate a parity check result, wherein the output string includes output bits respectively read from selected PUF units of the PUF units, and the parity string includes parity bits read from the selected PUF units.Type: GrantFiled: August 26, 2021Date of Patent: October 10, 2023Assignee: PUFsecurity CorporationInventors: Chi-Yi Shao, Kai-Hsin Chuang, Jun-Heng You, Meng-Yi Wu
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Publication number: 20230091881Abstract: A key storage device comprising a first key unit and a second key unit is disclosed. The first key unit is configured to output a first logic value through, comprising: a first setting circuit configured to output a first setting voltage; and a first inverter comprising a first output transistor having a first threshold voltage, configured to receive the first setting voltage and generate the first logic value. The second key unit is configured to output a second logic value through a second node, comprising: a second setting circuit configured to output a second setting voltage; and a second inverter comprising a second output transistor having a second threshold voltage, configured to receive the second setting voltage and generate the second logic value. The absolute value of first threshold voltage is lower than which of the second threshold voltage. The first setting voltage is higher than the second setting voltage.Type: ApplicationFiled: June 24, 2022Publication date: March 23, 2023Applicant: PUFsecurity CorporationInventors: Kai-Hsin Chuang, Chi-Yi Shao, Chun-Heng You
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Patent number: 11487505Abstract: A Physical Unclonable Function (PUF) based true random number generator (TRNG), a method for generating true random numbers, and an associated electronic device are provided. The PUF based TRNG may include a first obfuscation circuit, a cryptography circuit coupled to the first obfuscation circuit, and a second obfuscation circuit coupled to the cryptography circuit. The first obfuscation circuit obtains a first PUF value from a PUF pool of the electronic device, and performs a first obfuscation function on a preliminary seed based on the first PUF value to generate a final seed. The cryptography circuit utilizes the final seed as a key of a cryptography function to generate preliminary random numbers. The second obfuscation circuit obtains a second PUF value from the PUF pool, and performs a second obfuscation function on the preliminary random numbers based on the second PUF value to generate final random numbers.Type: GrantFiled: March 24, 2021Date of Patent: November 1, 2022Assignee: PUFsecurity CorporationInventors: Chun-Yuan Yu, Yung-Hsiang Liu, Kai-Hsin Chuang
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Publication number: 20220261221Abstract: A random number generator and a random number generating method are provided. The random number generator includes a first stage generator and a second stage generator. The first stage generator outputs a first random number and a second random number at a first time point and a second time point, respectively. The second stage generator generates a final output at least according to the first random number. More particularly, the second stage generator includes a reseed circuit for generating a reseed signal, to control whether to generate the final output according to the second random number. In addition, when the second stage generator generates the final output at a current data cycle without using the second random number, the first stage generator holds the second random number for generating the final output at a next data cycle.Type: ApplicationFiled: October 8, 2021Publication date: August 18, 2022Applicant: PUFsecurity CorporationInventors: Chun-Heng You, Chi-Yi Shao, Kai-Hsin Chuang, Meng-Yi Wu
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Publication number: 20220261508Abstract: A method and a control circuit for managing information of an electronic device are provided, where the electronic device includes the control chip. The method includes: utilizing a static entropy source of the control circuit to provide static entropy data; utilizing a cryptographic circuit of the control circuit to generate a public key and a private key according to the static entropy data, where the public key is to be registered into a blockchain by an identifier (ID) management device; and utilizing a signature generating circuit to generate a digital signature at least according to the private key, where the information of the electronic device is to be uploaded to the blockchain in conjunction with the digital signature.Type: ApplicationFiled: December 6, 2021Publication date: August 18, 2022Applicant: PUFsecurity CorporationInventor: Kai-Hsin Chuang
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Publication number: 20220187364Abstract: A built-in self-test (BIST) circuit and a BIST method for Physical Unclonable Function (PUF) quality check are provided. The BIST circuit may include a PUF array, a readout circuit coupled to the PUF array, and a first comparing circuit coupled to the readout circuit. The PUF array may include a plurality of PUF units, wherein each of the PUF units includes a first cell and a second cell. The readout circuit may be configured to output an output bit from the first cell and output a parity bit from the second cell. The first comparing circuit may be configured to compare an output string with a parity string to generate a parity check result, wherein the output string includes output bits respectively read from selected PUF units of the PUF units, and the parity string includes parity bits read from the selected PUF units.Type: ApplicationFiled: August 26, 2021Publication date: June 16, 2022Applicant: PUFsecurity CorporationInventors: Chi-Yi Shao, Kai-Hsin Chuang, Jun-Heng You, Meng-Yi Wu
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Publication number: 20210385094Abstract: A Physical Unclonable Function (PUF) based true random number generator (TRNG), a method for generating true random numbers, and an associated electronic device are provided. The PUF based TRNG may include a first obfuscation circuit, a cryptography circuit coupled to the first obfuscation circuit, and a second obfuscation circuit coupled to the cryptography circuit. The first obfuscation circuit obtains a first PUF value from a PUF pool of the electronic device, and performs a first obfuscation function on a preliminary seed based on the first PUF value to generate a final seed. The cryptography circuit utilizes the final seed as a key of a cryptography function to generate preliminary random numbers. The second obfuscation circuit obtains a second PUF value from the PUF pool, and performs a second obfuscation function on the preliminary random numbers based on the second PUF value to generate final random numbers.Type: ApplicationFiled: March 24, 2021Publication date: December 9, 2021Inventors: Chun-Yuan Yu, Yung-Hsiang Liu, Kai-Hsin Chuang