Abstract: Semiconductor cell structure and forming method thereof are provided. The semiconductor cell structure includes: a substrate including a first section and third regions on both sides of the first section in a first direction; and a first gate structure group including one or more first gate structures on the substrate. The first section includes a first region and a second region aligned along the first direction in the first section. The first region and the second region are configured to form transistors have a type opposite to a type of transistors configured to be formed in the third regions. The one or more first gate structures extend along the first direction across the first region, the second region, and the third regions on both sides of the first section.

Abstract: A flip-flop is provided. The flip-flop includes: a first inverter including an input terminal to receive data signal and an output terminal coupled to an input terminal of the master latch, a second inverter, a master latch including an output terminal coupled to an input terminal of a slave latch, and the slave latch including an output terminal coupled to an input terminal of the second inverter. An output terminal of the second inverter is configured as an output terminal of the flip-flop. A duration of the first clock signal inputted to the master latch is greater than a duration of the first clock signal inputted to the slave latch. A duration of the second clock signal inputted to the master latch is greater than a duration of the second clock signal inputted to the slave latch.

Abstract: A flip-flop is provided. The flip-flop includes: a first inverter including an input terminal to receive data signal and an output terminal coupled to an input terminal of the master latch, a second inverter, a master latch including an output terminal coupled to an input terminal of a slave latch, and the slave latch including an output terminal coupled to an input terminal of the second inverter. An output terminal of the second inverter is configured as an output terminal of the flip-flop. A duration of the first clock signal inputted to the master latch is greater than a duration of the first clock signal inputted to the slave latch. A duration of the second clock signal inputted to the master latch is greater than a duration of the second clock signal inputted to the slave latch.

Abstract: Semiconductor cell structure and forming method thereof are provided. The semiconductor cell structure includes: a substrate including a first section and third regions on both sides of the first section in a first direction; and a first gate structure group including one or more first gate structures on the substrate. The first section includes a first region and a second region aligned along the first direction in the first section. The first region and the second region are configured to form transistors have a type opposite to a type of transistors configured to be formed in the third regions. The one or more first gate structures extend along the first direction across the first region, the second region, and the third regions on both sides of the first section.