Patents by Inventor Kai Shao

Kai Shao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11644585
    Abstract: The present disclosure is related to a system. The system may include a gantry, a detector assembly including a plurality of detector modules arranged on the gantry, and/or a cooling assembly configured to cool the detector assemble. Each of the plurality of detector modules may include a crystal array configured to detect radiation rays, and a shielding component configured to shield the crystal array from an electromagnetic interference. The cooling assembly may include a plurality of cooling components. Each of the plurality of cooling components may be embedded in a corresponding detector module of the plurality of detector modules.
    Type: Grant
    Filed: March 21, 2021
    Date of Patent: May 9, 2023
    Assignee: SHANGHAI UNITED IMAGING HEALTHCARE CO., LTD.
    Inventors: Guanghe Wu, Fangjie Xu, Kai Shao, Huaifang Jiang, Miao Li
  • Patent number: 11424974
    Abstract: The present disclosure provides a multi-carrier time-division multiplexing (MC-TDMA) modulation and demodulation method and system. Before multi-carrier modulation is performed on an input symbol, an interleaving allocation and an FFT may be performed, a time domain symbol may be transformed into a frequency domain symbol signal to perform a MDFT treatment. A sending end may adopt an analyzing filter bank structure, and pre-filtering and an IFFT may be performed on a signal successively. A pre-filter may be positioned between an NM point FFT and an M point IFFT, a PAPR value of the system may be reduced using the symmetry of a coefficient of a filter, and a frequency domain symbol signal may be allocated to different sub-bands for multi-carrier modulation.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: August 23, 2022
    Assignee: CHONGQING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS
    Inventors: Guangyu Wang, Qianbin Chen, Kai Shao, Ling Zhuang
  • Publication number: 20210208294
    Abstract: The present disclosure is related to a system. The system may include a gantry, a detector assembly including a plurality of detector modules arranged on the gantry, and/or a cooling assembly configured to cool the detector assemble. Each of the plurality of detector modules may include a crystal array configured to detect radiation rays, and a shielding component configured to shield the crystal array from an electromagnetic interference. The cooling assembly may include a plurality of cooling components. Each of the plurality of cooling components may be embedded in a corresponding detector module of the plurality of detector modules.
    Type: Application
    Filed: March 21, 2021
    Publication date: July 8, 2021
    Applicant: SHANGHAI UNITED IMAGING HEALTHCARE CO., LTD.
    Inventors: Guanghe WU, Fangjie XU, Kai SHAO, Huaifang JIANG, Miao LI
  • Patent number: 11011140
    Abstract: An image rendering method and apparatus relate to the field of communications technologies and include a moving direction of a head of a user wearing a virtual reality (VR) device being detected, at least two rendering areas in a display interface being determined based on the moving direction, and then images displayed in different rendering areas being rendered using different rendering intensity coefficients, where a rendering intensity coefficient of a rendering area to which the moving direction points is greater than a rendering intensity coefficient of a rendering area to which an opposite direction of the moving direction points.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: May 18, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yu Xu, Jinghua Sima, Kai Shao
  • Publication number: 20210051050
    Abstract: The present disclosure provides a multi-carrier time-division multiplexing (MC-TDMA) modulation and demodulation method and system. Before multi-carrier modulation is performed on an input symbol, an interleaving allocation and an FFT may be performed, a time domain symbol may be transformed into a frequency domain symbol signal to perform a MDFT treatment. A sending end may adopt an analyzing filter bank structure, and pre-filtering and an IFFT may be performed on a signal successively. A pre-filter may be positioned between an NM point FFT and an M point IFFT, a PAPR value of the system may be reduced using the symmetry of a coefficient of a filter, and a frequency domain symbol signal may be allocated to different sub-bands for multi-carrier modulation.
    Type: Application
    Filed: November 2, 2020
    Publication date: February 18, 2021
    Applicant: CHONGQING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS
    Inventors: Guangyu WANG, Qianbin CHEN, Kai SHAO, Ling ZHUANG
  • Patent number: 10826742
    Abstract: The present disclosure provides a multi-carrier time-division multiplexing (MC-TDMA) modulation and demodulation method and system. Before multi-carrier modulation is performed on an input symbol, an interleaving allocation and an FFT may be performed, a time domain symbol may be transformed into a frequency domain symbol signal to perform a MDFT treatment. A sending end may adopt an analyzing filter bank structure, and pre-filtering and an IFFT may be performed on a signal successively. A pre-filter may be positioned between an NM point FFT and an M point IFFT, a PAPR value of the system may be reduced using the symmetry of a coefficient of a filter, and a frequency domain symbol signal may be allocated to different sub-bands for multi-carrier modulation.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: November 3, 2020
    Assignee: CHONGQING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS
    Inventors: Guangyu Wang, Qianbin Chen, Kai Shao, Ling Zhuang
  • Publication number: 20200084078
    Abstract: The present disclosure provides a multi-carrier time-division multiplexing (MC-TDMA) modulation and demodulation method and system. Before multi-carrier modulation is performed on an input symbol, an interleaving allocation and an FFT may be performed, a time domain symbol may be transformed into a frequency domain symbol signal to perform a MDFT treatment. A sending end may adopt an analyzing filter bank structure, and pre-filtering and an IFFT may be performed on a signal successively. A pre-filter may be positioned between an NM point FFT and an M point IFFT, a PAPR value of the system may be reduced using the symmetry of a coefficient of a filter, and a frequency domain symbol signal may be allocated to different sub-bands for multi-carrier modulation.
    Type: Application
    Filed: November 14, 2019
    Publication date: March 12, 2020
    Applicant: CHONGQING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS
    Inventors: Guangyu WANG, Qianbin CHEN, Kai SHAO, Ling ZHUANG
  • Patent number: 10541846
    Abstract: The present disclosure provides a multi-carrier time-division multiplexing (MC-TDMA) modulation and demodulation method and system. Before multi-carrier modulation is performed on an input symbol, an interleaving allocation and an FFT may be performed, a time domain symbol may be transformed into a frequency domain symbol signal to perform a MDFT treatment. A sending end may adopt an analyzing filter bank structure, and pre-filtering and an IFFT may be performed on a signal successively. A pre-filter may be positioned between an NM point FFT and an M point IFFT, a PAPR value of the system may be reduced using the symmetry of a coefficient of a filter, and a frequency domain symbol signal may be allocated to different sub-bands for multi-carrier modulation.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: January 21, 2020
    Assignee: CHONGQING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS
    Inventors: Guangyu Wang, Qianbin Chen, Kai Shao, Ling Zhuang
  • Publication number: 20190355325
    Abstract: An image rendering method and apparatus relate to the field of communications technologies and include a moving direction of a head of a user wearing a virtual reality (VR) device being detected, at least two rendering areas in a display interface being determined based on the moving direction, and then images displayed in different rendering areas being rendered using different rendering intensity coefficients, where a rendering intensity coefficient of a rendering area to which the moving direction points is greater than a rendering intensity coefficient of a rendering area to which an opposite direction of the moving direction points.
    Type: Application
    Filed: August 17, 2017
    Publication date: November 21, 2019
    Inventors: Yu Xu, Jinghua Sima, Kai Shao
  • Publication number: 20180091343
    Abstract: The present disclosure provides a multi-carrier time-division multiplexing (MC-TDMA) modulation and demodulation method and system. Before multi-carrier modulation is performed on an input symbol, an interleaving allocation and an FFT may be performed, a time domain symbol may be transformed into a frequency domain symbol signal to perform a MDFT treatment. A sending end may adopt an analyzing filter bank structure, and pre-filtering and an IFFT may be performed on a signal successively. A pre-filter may be positioned between an NM point FFT and an M point IFFT, a PAPR value of the system may be reduced using the symmetry of a coefficient of a filter, and a frequency domain symbol signal may be allocated to different sub-bands for multi-carrier modulation.
    Type: Application
    Filed: March 31, 2015
    Publication date: March 29, 2018
    Applicant: CHONGQING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS
    Inventors: Guangyu WANG, Qianbin CHEN, Kai SHAO, Ling ZHUANG
  • Publication number: 20160300258
    Abstract: A digital transaction method is applied in a user device. The user device instructs a digital transaction management server system to bind a device identification code of the user device and an order after the user device purchases with the digital transaction management server system and accordingly obtains the order. The user device generates a digital certification and a safety code, wherein the safety code varies according to a predetermined varying sequence during a predetermined time interval. After the safety code passes through an electronic verification of a service provider, the user device requests the service provider to settle an electronic transaction.
    Type: Application
    Filed: December 16, 2015
    Publication date: October 13, 2016
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Wei CHAO, Kuei-Kai SHAO, Kuo-Shu LUO
  • Publication number: 20150091034
    Abstract: A light-emitting diode (LED) package structure includes a lead frame, a LED chip, a package body, N opaque spacer and N+1 encapsulating glues. The LED chip is disposed on the lead frame; the package body covers the lead frame and exposes the LED chip. The package body has an accommodation space, divided by the N opaque spacers disposed on the LED chip into N+1 chambers. The N+1 encapsulating glues are filled into the N+1 chambers, where N is a natural number.
    Type: Application
    Filed: July 21, 2014
    Publication date: April 2, 2015
    Inventors: Che-Ming HSU, Wen-Kai SHAO, Liang-Ta LIN
  • Patent number: 8981415
    Abstract: A light-emitting diode (LED) package structure includes a lead frame, a LED chip, a package body, N opaque spacer and N+1 encapsulating glues. The LED chip is disposed on the lead frame; the package body covers the lead frame and exposes the LED chip. The package body has an accommodation space, divided by the N opaque spacers disposed on the LED chip into N+1 chambers. The N+1 encapsulating glues are filled into the N+1 chambers, where N is a natural number.
    Type: Grant
    Filed: July 21, 2014
    Date of Patent: March 17, 2015
    Assignee: Lextar Electronics Corporation
    Inventors: Che-Ming Hsu, Wen-Kai Shao, Liang-Ta Lin
  • Publication number: 20150029723
    Abstract: The disclosure provides a light-emitting diode (LED) package structure, including: a lead frame; at least two light-emitting diode chips having different light-emitting wavelengths disposed on the lead frame; an encapsulant disposed over the lead frame and covering the light-emitting diode chips, wherein the encapsulant has a first concave portion; and an optical glue disposed in the first concave portion, wherein the optical glue has a plurality of scattering particles to uniformly mix the lights of different wavelengths emitted by the light-emitting diode chips.
    Type: Application
    Filed: April 11, 2014
    Publication date: January 29, 2015
    Applicant: LEXTAR ELECTRONICS CORPORATION
    Inventors: Shih-Ju Lo, Cheng-Ping Chang, Hui-Kai Hsu, I-Chun Lee, Wen-Kai Shao
  • Patent number: 8186409
    Abstract: The present invention provides a tag ablation mechanism and a tag-and-tape combination apparatus using the same, wherein a driving gear is actuated to rotate by a rotating device by way of a lever to drive a driven gear to rotate so as to ablate a tag from a bottom paper extended from a tag roll on the driven gear. In the present invention, an ablated tag is capable of being combined with a tape so that the tag attached to the tape can be adhered to a packaged object. The mechanism and apparatus of the present invention are capable of adjusting a rotating arc length so as to handle various tags with different sizes and lengths and to complete tag ablation and tag-and-tape combination in each driving operation.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: May 29, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Kuei-Kai Shao, Pei-Chun Chen, Chen-Shen Liu, Chin-Lu Huang
  • Publication number: 20100307688
    Abstract: The present invention provides a tag ablation mechanism and a tag-and-tape combination apparatus using the same, wherein a driving gear is actuated to rotate by a rotating device by way of a lever to drive a driven gear to rotate so as to ablate a tag from a bottom paper extended from a tag roll on the driven gear. In the present invention, an ablated tag is capable of being combined with a tape so that the tag attached to the tape can be adhered to a packaged object. The mechanism and apparatus of the present invention are capable of adjusting a rotating arc length so as to handle various tags with different sizes and lengths and to complete tag ablation and tag-and-tape combination in each driving operation.
    Type: Application
    Filed: November 19, 2009
    Publication date: December 9, 2010
    Applicant: Industrial Technology Research Institute
    Inventors: KUEI-KAI SHAO, Pei-Chun Chen, Chen-Shen Liu, Chin-Lu Huang
  • Patent number: 7382027
    Abstract: A CMOS RF device and a method to fabricate said device with low gate contact resistance are described. Conventional MOS transistor is first formed with isolation regions, poly-silicon gate structure, sidewall spacers around poly gate, and implanted source/drain with lightly and heavily doped regions. A silicon dioxide layer such as TEOS is deposited, planarized with chemical mechanical polishing (CMP) to expose the gate and treated with dilute HF etchant to recess the silicon dioxide layer below the surface of the gate. Silicon nitride is then deposited and planarized with CMP and then etched except around the gates, using a oversize poly-silicon gate mask. Inter-level dielectric mask is then deposited, contact holes etched, and contact metal is deposited to form the transistor. During contact hole etch over poly-silicon gate, silicon nitride around the poly gate acts as an etch stop.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: June 3, 2008
    Assignee: Chartered Semiconductor Manufacturing, Ltd.
    Inventors: Purakh Raj Verma, Sanford Chu, Lap Chan, Yelehanka Pradeep, Kai Shao, Jia Zhen Zheng
  • Publication number: 20050136573
    Abstract: A CMOS RF device and a method to fabricate said device with low gate contact resistance are described. Conventional MOS transistor is first formed with isolation regions, poly-silicon gate structure, sidewall spacers around poly gate, and implanted source/drain with lightly and heavily doped regions. A silicon dioxide layer such as TEOS is deposited, planarized with chemical mechanical polishing (CMP) to expose the gate and treated with dilute HF etchant to recess the silicon dioxide layer below the surface of the gate. Silicon nitride is then deposited and planarized with CMP and then etched except around the gates, using a oversize poly-silicon gate mask. Inter-level dielectric mask is then deposited, contact holes etched, and contact metal is deposited to form the transistor. During contact hole etch over poly-silicon gate, silicon nitride around the poly gate acts as an etch stop.
    Type: Application
    Filed: January 28, 2005
    Publication date: June 23, 2005
    Inventors: Purakh Rajverma, Sanford Chu, Lap Chan, Yelehanka Ramachandramurthy Pradeep, Kai Shao, Jia Zheng
  • Publication number: 20050086780
    Abstract: A method of forming a capacitor comprising the following steps. A substrate having a lower low-k dielectric layer formed thereover is provided with the lower low-k dielectric layer having a dielectric constant of less than about 3.0. Metal vertical electrode plates are formed within the lower low-k dielectric layer so that the adjacent metal vertical electrode plates have lower low-k dielectric layer portions therebetween. The lower low-k dielectric layer portions between the adjacent metal vertical electrode plates are replaced with high-k dielectric material trench portions having a dielectric constant of greater than about 3.0.
    Type: Application
    Filed: October 23, 2003
    Publication date: April 28, 2005
    Inventors: Kai Shao, Chit Ng, Purakh Verma, Jia Zheng, Sanford Chu
  • Publication number: 20050059216
    Abstract: A CMOS RF device and a method to fabricate said device with low gate contact resistance are described. Conventional MOS transistor is first formed with isolation regions, poly-silicon gate structure, sidewall spacers around poly gate, and implanted source/drain with lightly and heavily doped regions. A silicon dioxide layer such as TEOS is deposited, planarized with chemical mechanical polishing (CMP) to expose the gate and treated with dilute HF etchant to recess the silicon dioxide layer below the surface of the gate. Silicon nitride is then deposited and planarized with CMP and then etched except around the gates, using a oversize poly-silicon gate mask. Inter-level dielectric mask is then deposited, contact holes etched, and contact metal is deposited to form the transistor. During contact hole etch over poly-silicon gate, silicon nitride around the poly gate acts as an etch stop.
    Type: Application
    Filed: September 17, 2003
    Publication date: March 17, 2005
    Inventors: Purakh Verma, Sanford Chu, Lap Chan, Yelehanka Ramachandramurthy Pradeep, Kai Shao, Jia Zheng