Abstract: A method and system are provided to construct, from a TensorFlow graph, a common intermediate representation that can be converted to a plurality of compiler intermediate representations (IRs), which enables compiler optimization to be applied efficiently.

Abstract: There is provided methods and devices for computing a tile size for software optimization. A method includes receiving, by a computing device, information indicative of one or more of a set of loop bounds and a set of data shapes; processing, by the computing device, the information to determine a computation configuration based on the obtained information, the computation configuration implementable by a compiler, said processing including evaluating at least the computation configuration based on a build cost model, the build cost model representative of a data transfer cost and a data efficiency of the computation configuration; and transmitting, by the computing device, instructions directing the compiler to implement the computation configuration.

Abstract: A computer-implemented method includes the following operations. A transactional lock elision transaction including a critical section is executed. The critical section is processed. After the processing of the critical section and prior to a commit point in the transactional lock elision transaction, a status of a lock is checked. Responsive to a determination that a status of the lock is free, a result of the transactional lock elision transaction is committed.

Abstract: There is provided methods and devices for computing a tile size for software optimization. A method includes receiving, by a computing device, information indicative of one or more of a set of loop bounds and a set of data shapes; processing, by the computing device, the information to determine a computation configuration based on the obtained information, the computation configuration implementable by a compiler, said processing including evaluating at least the computation configuration based on a build cost model, the build cost model representative of a data transfer cost and a data efficiency of the computation configuration; and transmitting, by the computing device, instructions directing the compiler to implement the computation configuration.

Abstract: A method includes analyzing a dataflow graph representing data dependencies between operators of a dataflow application to identify a plurality of candidate groups of the operators. Based on characteristics of a given hardware accelerator and the operators of a given candidate group of the plurality of candidate groups, determining whether the operators of the given candidate group are to be combined. In response to determining that the operators of the given candidate group are to be combined, retrieving executable binary code segments corresponding to the operators of the given candidate group, generating a unit of binary code including the executable binary code segments and metadata representing an execution control flow among the executable binary code segments, and dispatching the unit of code to the given hardware accelerator for execution of the unit of code.

Abstract: A method for accelerating a convolution operation includes receiving from an I/O interface, a first data set and a second data set. Transforming the first data set into a first converted data set, the first converted data set having the first format. Transforming the second data set into a second converted data set, the second converted data set having the second format. Loading into a convolution functional unit, the first converted data set and the second converted data set, where the convolution functional unit is configured to receive a first data in a first format, to receive a second data in a second format, and to output a third data in a third format. Receiving, by the task scheduler from the convolution functional unit, a result in the third format.

Abstract: A method and system are provided to construct, from a TensorFlow graph, a common intermediate representation that can be converted to a plurality of compiler intermediate representations (IRs), which enables compiler optimization to be applied efficiently.

Abstract: Systems, methods, and processor readable media are described for verifying software. A liquid type system is used by a programming language to allow source code to define tensor variables with dimensionality and/or shape dynamically defined at runtime. The dimensionality and shape of a tensor variable invoked in the source code, as well as the data type of the constituent elements of such a tensor variable, may be defined by a static type that may be verified at compile time.

Abstract: Embodiments of this disclosure allow non-position-independent-code to be shared between a closed application and a subsequent application without converting the non-position-independent-code into position-independent-code. In particular, embodiment techniques store live data of a closed application during runtime of the closed application, and thereafter page a portion of the live data that is common to both the closed application and a subsequent application back into volatile memory at the same virtual memory address in which the portion of live data was stored during runtime of the closed application so that the paged lived data may be re-used to execute the subsequent application in the managed runtime environment. Because the paged live data is stored at the same virtual memory address during the runtimes of both applications, non-position-independent-code can be shared between the applications.

Abstract: Systems, methods, and processor readable media are described for verifying software. A liquid type system is used by a programming language to allow source code to define tensor variables with dimensionality and/or shape dynamically defined at runtime. The dimensionality and shape of a tensor variable invoked in the source code, as well as the data type of the constituent elements of such a tensor variable, may be defined by a static type that may be verified at compile time.

Abstract: A method includes analyzing a dataflow graph representing data dependencies between operators of a dataflow application to identify a plurality of candidate groups of the operators. Based on characteristics of a given hardware accelerator and the operators of a given candidate group of the plurality of candidate groups, determining whether the operators of the given candidate group are to be combined. In response to determining that the operators of the given candidate group are to be combined, retrieving executable binary code segments corresponding to the operators of the given candidate group, generating a unit of binary code including the executable binary code segments and metadata representing an execution control flow among the executable binary code segments, and dispatching the unit of code to the given hardware accelerator for execution of the unit of code.

Abstract: A method includes analyzing a dataflow graph representing data dependencies between operators of a dataflow application to identify a plurality of candidate groups of the operators. Based on characteristics of a given hardware accelerator and the operators of a given candidate group of the plurality of candidate groups, determining whether the operators of the given candidate group are to be combined. In response to determining that the operators of the given candidate group are to be combined, retrieving executable binary code segments corresponding to the operators of the given candidate group, generating a unit of binary code including the executable binary code segments and metadata representing an execution control flow among the executable binary code segments, and dispatching the unit of code to the given hardware accelerator for execution of the unit of code.

Abstract: A method includes analyzing a dataflow graph representing data dependencies between operators of a dataflow application to identify a plurality of candidate groups of the operators. Based on characteristics of a given hardware accelerator and the operators of a given candidate group of the plurality of candidate groups, determining whether the operators of the given candidate group are to be combined. In response to determining that the operators of the given candidate group are to be combined, retrieving executable binary code segments corresponding to the operators of the given candidate group, generating a unit of binary code including the executable binary code segments and metadata representing an execution control flow among the executable binary code segments, and dispatching the unit of code to the given hardware accelerator for execution of the unit of code.

Abstract: A computer implemented method manages execution of applications within a memory space of a multi-tenant virtual machine (MVM). The method includes instantiating a container for an application. The container has a thin client and a name space that is part of a memory space of the MVM. Threads of the application are moved from the MVM to the container. The threads are executed using the thin client in the name space of the container.

Abstract: Methods and systems for managing a connection in an internet protocol virtual server (IPVS). At least a portion of checkpoint data is transmitted by a first node of the IPVS to a load balancer of the IPVS. The checkpoint data includes information for restoring an active connection of the first node and also information representing the current state of the active connection. The load balancer stores the checkpoint data in association with connection data for the connection. The first node terminates the connection. The load balancer updates the connection data with information about a second node of the IPVS. The checkpoint data is transmitted to the second node. Incoming data packets for the connection are then forwarded to the second node, in accordance with the updated connection data.

Abstract: In some examples, a controller comprises a bucketization logic to receive a bucketization indication from a host processor, and in response to the bucketization indication, partition data stored in a memory of a storage device into buckets, wherein a first bucket of the buckets comprises data items that share a first common characteristic. The bucketization logic is to send data items of the first bucket to the host processor for processing by the host processor using a first code module configured for the first common characteristic of the first bucket.

Abstract: An embodiment method for retiring a dynamically updatable function includes receiving, by a collector-thread, a registration of the function, wherein the registration indicates to the collector-thread addresses of memory locations for counters that count a number of calls currently being made to a previous version of the function by a plurality of execution threads; reading, by the collector-thread, values of the counters; and when the values of all the counters are zero, deleting, by the collector-thread, the function from a storage medium on a device previously executing the previous version of the function.

Abstract: A computer implemented method manages execution of applications within a memory space of a multi-tenant virtual machine (MVM). The method includes instantiating a container for an application. The container has a thin client and a name space that is part of a memory space of the MVM. Threads of the application are moved from the MVM to the container. The threads are executed using the thin client in the name space of the container.

Abstract: System and method for managing migration of global variables on processing system during live program updates, including creating a shared data segment is created in a physical memory of the processing system, binding a logical address space of a first global variable data segment for a first version of a program to a physical address of the shared data segment, and binding a logical address space for a second global variable data segment for an update version of the program to the physical address of the shared data segment. The first global variable data segment and the second global variable data segment exist concurrently and each map to common global variables stored in the shared data segment.

Abstract: Embodiments of this disclosure allow non-position-independent-code to be shared between a closed application and a subsequent application without converting the non-position-independent-code into position-independent-code. In particular, embodiment techniques store live data of a closed application during runtime of the closed application, and thereafter page a portion of the live data that is common to both the closed application and a subsequent application back into volatile memory at the same virtual memory address in which the portion of live data was stored during runtime of the closed application so that the paged lived data may be re-used to execute the subsequent application in the managed runtime environment. Because the paged live data is stored at the same virtual memory address during the runtimes of both applications, non-position-independent-code can be shared between the applications.