Abstract: The present invention provides a composition, comprising ferrous amino acid chelate particles sintered from ferrous amino acid chelate, wherein the average particle size of the ferrous amino acid chelate particles ranges from 500 nm to 2600 nm, and the average molecular weight of the particles ranges from 1,500 Dalton to 600,000 Dalton. Besides, the present invention can be used for manufacturing a medicament for treating or ameliorating a pancreas-related disease, wherein the medicament comprises an effective amount of the composition and a pharmaceutically acceptable carrier.

Abstract: The present invention provides a composition, comprising ferrous amino acid chelate particles sintered from ferrous amino acid chelate, wherein the average particle size of the ferrous amino acid chelate particles ranges from 500 nm to 2600 nm, and the average molecular weight of the particles ranges from 1,500 Dalton to 600,000 Dalton. Besides, the present invention can be used for manufacturing a medicament for treating or ameliorating a pancreas-related disease, wherein the medicament comprises an effective amount of the composition and a pharmaceutically acceptable carrier.

Abstract: A composition includes sintered nanoparticles prepared by sintering a chelate of ferrous ions with an amino acid. The sintered nanoparticles have an average particle diameter ranging from 10 to 400 nm as determined by Electron Probe X-ray Micro-Analyzer. Also disclosed herein are a method for inhibiting and/or killing a virus in a subject and applications of such method. The method includes administering to the subject the composition.

Abstract: A composition includes sintered ferrous amino acid particles prepared by sintering a ferrous amino acid chelate which includes ferrous ions and an amino acid. The sintered ferrous amino acid particles have an average particle size ranging from 500 to 2600 nm and a weight average molecular weight ranging from 1,500 Dalton to 600,000 Dalton. Also disclosed herein are a method for inhibiting and/or killing a virus in a subject and applications of such method. The method includes administering to the subject the composition.

Abstract: A composition includes sintered ferrous amino acid particles prepared by sintering a ferrous amino acid chelate which includes ferrous ions and an amino acid. The sintered ferrous amino acid particles have an average particle size ranging from 500 to 2600 nm and a weight average molecular weight ranging from 1,500 Dalton to 600,000 Dalton. Also disclosed herein are a method for inhibiting and/or killing a virus in a subject and applications of such method. The method includes administering to the subject the composition.

Abstract: Disclosed herein is a method for treating infection by an enteropathogen and/or enhancing growth performance, which includes administering to a subject in need thereof a composition containing a ferrous amino acid chelate. Also disclosed herein is an animal feed containing the ferrous amino acid chelate.

Abstract: A composition includes sintered nanoparticles prepared by sintering a chelate of ferrous ions with an amino acid. The sintered nanoparticles have an average particle diameter ranging from 10 to 400 nm as determined by Electron Probe X-ray Micro-Analyzer. Also disclosed herein are a method for inhibiting and/or killing a virus in a subject and applications of such method. The method includes administering to the subject the composition.

Abstract: The present invention provides use of a composition comprising ferrous amino acid chelate for the manufacture of a medicament for treatment of liver dysfunction, wherein the medicament comprises an effective amount of the ferrous amino acid chelate composition and a pharmaceutically acceptable carrier. The present invention proves that the serum biochemistry values related to the liver function can be reduced by administering the composition comprising ferrous amino acid chelate. For animals whose liver functions cannot be improved by long-term administration of S-adenosylmethionine, their liver functions can be effectively improved by administration of the composition comprising ferrous amino acid chelate of the present invention instead. Furthermore, the composition comprising ferrous amino acid chelate can improve the functions of an aged liver.

Abstract: A composition includes sintered ferrous amino acid particles prepared by sintering a ferrous amino acid chelate which includes ferrous ions and an amino acid. The sintered ferrous amino acid particles have an average particle size ranging from 500 to 2600 nm and a weight average molecular weight ranging from 1,500 Dalton to 600,000 Dalton. Also disclosed herein are a method for inhibiting and/or killing a virus in a subject and applications of such method. The method includes administering to the subject the composition.

Abstract: Disclosed herein is a method for treating infection by an enteropathogen and/or enhancing growth performance, which includes administering to a subject in need thereof a composition containing a ferrous amino acid chelate. Also disclosed herein is an animal feed containing the ferrous amino acid chelate.

Abstract: A composition includes sintered ferrous amino acid particles prepared by sintering a ferrous amino acid chelate which includes ferrous ions and an amino acid. The sintered ferrous amino acid particles have an average particle size ranging from 500 to 2600 nm and a weight average molecular weight ranging from 1,500 Dalton to 600,000 Dalton. Also disclosed herein are a method for inhibiting and/or killing a virus in a subject and applications of such method. The method includes administering to the subject the composition.

Abstract: A computer implemented method, apparatus, and computer usable program code for compiling source code for performing a complex operation followed by a complex reduction operation. A method is determined for generating executable code for performing the complex operation and the complex reduction operation. Executable code is generated for computing sub-products, reducing the sub-products to intermediate results, and summing the intermediate results to generate a final result in response to a determination that a reduced single instruction multiple data method is appropriate.

Abstract: A computer implemented method, apparatus, and computer usable program code for compiling source code for performing a complex operation followed by a complex reduction operation. A method is determined for generating executable code for performing the complex operation and the complex reduction operation. Executable code is generated for computing sub-products, reducing the sub-products to intermediate results, and summing the intermediate results to generate a final result in response to a determination that a reduced single instruction multiple data method is appropriate.

Abstract: A method, computer program product, and information handling system for generating loop code to execute on Single-Instruction Multiple-Datapath (SIMD) architectures, where the loop contains multiple non-stride-one memory accesses that operate over a contiguous stream of memory is disclosed. A preferred embodiment identifies groups of isomorphic statements within a loop body where the isomorphic statements operate over a contiguous stream of memory over the iteration of the loop. Those identified statements are then converted in to virtual-length vector operations. Next, the hardware's available vector length is used to determine a number of virtual-length vectors to aggregate into a single vector operation for each iteration of the loop. Finally, the aggregated, vectorized loop code is converted into SIMD operations.

Abstract: Computer implemented method, system and computer program product for aligning vectors to be processed by SIMD code. A pair of vectors to be aligned at runtime and having a known relative alignment at compile time is identified. A modified second memory reference is generated by modifying an address of the second memory reference to be in a same congruence class as the first memory reference, wherein the congruence class is mod V and wherein V is SIMD byte width. A first SIMD load located at the modified second memory reference and a next adjacent SIMD load located at a third memory reference corresponding to the modified second memory reference address plus V are loaded, and the first SIMD load and the next adjacent SIMD load are concatenated to generate a resultant vector of length 2V.

Abstract: A computer implemented method, system and computer program product for automatically generating SIMD code, particularly in the presence of multi-threading and other false sharing conditions, and in machines having a segmented/virtual page memory protection system. The method begins by analyzing data to be accessed by a targeted loop including at least one statement, where each statement has at least one memory reference, to determine if memory accesses are safe. If memory accesses are safe, the targeted loop is simdized. If not safe, it is determined if a scheme can be applied in which safety need not be guaranteed. If such a scheme can be applied, the scheme is applied and the targeted loop is simdized according to the scheme. If such a scheme cannot be applied, it is determined if padding is appropriate. If padding is appropriate, the data is padded and the targeted loop is simdized.

Abstract: A method for analyzing data reordering operations in Single Issue Multiple Data source code and generating executable code therefrom is provided. Input is received. One or more data reordering operations in the input are identified and each data reordering operation in the input is abstracted into a corresponding virtual shuffle operation so that each virtual shuffle operation forms part of an expression tree. One or more virtual shuffle trees are collapsed by combining virtual shuffle operations within at least one of the one or more virtual shuffle trees to form one or more combined virtual shuffle operations, wherein each virtual shuffle tree is a subtree of the expression tree that only contains virtual shuffle operations. Then code is generated for the one or more combined virtual shuffle operations.

Abstract: A system and method is provided for vectorizing misaligned references in compiled code for SIMD architectures that support only aligned loads and stores. In this framework, a loop is first simdized as if the memory unit imposes no alignment constraints. The compiler then inserts data reorganization operations to satisfy the actual alignment requirements of the hardware. Finally, the code generation algorithm generates SIMD codes based on the data reorganization graph, addressing realistic issues such as runtime alignments, unknown loop bounds, residual iteration counts, and multiple statements with arbitrary alignment combinations. Loop peeling is used to reduce the computational overhead associated with misaligned data. A loop prologue and epilogue are peeled from individual iterations in the simdized loop, and vector-splicing instructions are applied to the peeled iterations, while the steady-state loop body incurs no additional computational overhead.

Abstract: A method, computer program product, and information handling system for generating loop code to execute on Single-Instruction Multiple-Datapath (SIMD) architectures, where the loop contains multiple non-stride-one memory accesses that operate over a contiguous stream of memory is disclosed. A preferred embodiment identifies groups of isomorphic statements within a loop body where the isomorphic statements operate over a contiguous stream of memory over the iteration of the loop. Those identified statements are then converted in to virtual-length vector operations. Next, the hardware's available vector length is used to determine a number of virtual-length vectors to aggregate into a single vector operation for each iteration of the loop. Finally, the aggregated, vectorized loop code is converted into SIMD operations.

Abstract: A method, computer program product, and information handling system for generating loop code to execute on Single-Instruction Multiple-Datapath (SIMD) architectures, where the loop operates on datatypes having different lengths, is disclosed. Further, a preferred embodiment of the present invention includes a novel technique to efficiently realign or shift arbitrary streams to an arbitrary offset, regardless whether the alignments or offsets are known at the compile time or not. This technique enables the application of advanced alignment optimizations to runtime alignment. This allows sequential loop code operating on datatypes of disparate length to be transformed (“simdized”) into optimized SIMD code through a fully automated process.