Abstract: Example methods are provided for a network device to perform packet capture in a software-defined networking (SDN) environment. One example method may comprise detecting an egress packet that includes an inner header addressed from a first node to a second node; and identifying a security policy applicable to the egress packet by comparing one or more fields in the inner header with one or more match fields specified by the security policy. The method may further comprise: based on the security policy, capturing the egress packet in an unencrypted form; performing encryption on the egress packet to generate an encrypted packet that includes the egress packet in an encrypted form; and sending the encrypted packet to the second node.

Abstract: A system and method optionally includes or utilizes a processor may receive a request for social network content for display in a position of a plurality of sponsored content positions in a newsfeed of a social network interface, each of the plurality of sponsored content positions having a position criterion, at least two of the plurality of sponsored content positions having a different position criterion and identify a sponsored content item of a plurality of sponsored content items stored on a database based, at least in part, on a characteristic of the sponsored content item meeting the position criterion and a bid associated with the sponsored content item. A transmitter may transmit the sponsored content item from the processor to a server for display on a user interface.

Abstract: A display panel including a pixel array, a plurality of first shift registers, a plurality of second shift registers, a plurality of first discharge circuits, and a plurality of second discharge circuits is provided. The pixel array includes a plurality of gate lines. The shift registers provide a plurality of gate signals to the gate lines. Each of the first discharge circuits receives a third gate signal to discharge a same first gate line together with the corresponding first shift register. A rising edge of the third gate signal substantially matches a falling edge of the corresponding first gate signal. Each of the second discharge circuits receives a fourth gate signal to discharge a same second gate line together with the corresponding second shift register. A rising edge of the fourth gate signal substantially matches a falling edge of the corresponding second gate signal.

Abstract: A structure for attaching an ultrasound sensor to a side portion of a vehicle includes a bracket via which the ultrasound sensor is attached to face the ground under the floor of the vehicle and to be inclined at a predetermined angle with respect to the horizontal plane such that water drops adhering to the ultrasound sensor flow downward.

Abstract: An electrical receptacle connector includes a shielding shell, an insulation housing and a plurality of terminals. The insulation housing is arranged inside the shielding shell and has a tongue portion extending to the outside of the shielding shell. The terminals are arranged at the insulation housing, and each terminal has a contact segment and a soldering segment. The contact segment is located on the tongue portion and protrudes from therefrom, the soldering segment extends from the insulation housing for a distance. The soldering segments are coplanar.

Abstract: Provided is a gate driving circuit, coupled to a pixel array having multiple gate lines. The gate driving circuit includes multiple shift registers and multiple pull-up transistor, coupled to the pixel array and separately located on two opposite sides of the pixel array. Shift registers located on a same side are sequentially coupled to each other. An nth (n is a positive integer) pull-up transistor includes: a control end, coupled to a control end of a driving transistor of an (n?1)th shift register located on a same side as the nth pull-up transistor; a first end, used to receive a clock signal, where the clock signal is further input to an nth shift register of the shift registers located on an opposite side of the nth pull-up transistor; and a second end, coupled to an nth gate line of the pixel array and used to drive the nth gate line.

Abstract: An electronic device includes a base plate and a miniaturized multiband antenna. The multiband antenna is set on the base plate. The base plate includes a first side and a second side relative to the first side. The multiband antenna includes a first radiating part and a second radiating part. The first radiating part is set on the first side. The second radiating part is set on the second side. A gap is formed between the first radiating part and the second radiating part which facilitates a coupling oscillation between the first radiating part and the second radiating part, which enables the multiband antenna to work in at least one working band.

Abstract: A display device including a housing, a display module, a carrier and a color correction module is provided. The display module is disposed in the housing and exposes a display plane, which faces a first direction vertical to the display plane. The carrier is movably connected to the housing and disposed outside the housing or disposed on a back side of the display module. The back side faces to a second direction opposite to the first direction. The color correction module is disposed on the carrier and has a sensing face. The carrier is selectively disposed at a first position or a second position with respect to the housing. When the carrier is at the second position, the sensing face of the color correction module is moved to face the display plane.

Abstract: Some embodiments provide a network system. The network system includes a first set of host machines for hosting virtual machines that connect to each other through a logical network. The first set of host machines includes managed forwarding elements for forwarding data between the host machines. The network system includes a second set of host machines for hosting virtualized containers that operate as gateways for forwarding data between the virtual machines and an external network. At least one of the virtualized containers peers with at least one physical router in the external network in order to advertise addresses of the virtual machines to the physical router.

Abstract: A shift register and a touch display apparatus thereof are provided. The shift register includes a voltage setting unit, a driving unit, a control unit, a discharge unit, a first compensation transistor, and a second compensation transistor. The voltage setting unit sets a terminal voltage of an internal terminal. The driving unit is coupled to the internal terminal to provide a gate signal and a driving signal. The control unit receives the terminal voltage to provide a control signal. The discharge unit discharges the terminal voltage and the gate signal according to the control signal. The first compensation transistor and the second compensation transistor are coupled in series between a touch enable signal and the internal terminal, and control terminals of the first compensation transistor and the second compensation transistor receive the terminal voltage and the touch enable signal, respectively.

Abstract: A multiplexer applied to a display device includes: a plurality of switching units, electrically coupled to a data driver and a plurality of pixel units, where the switching units are adapted to receive a plurality of input display data signals output by the data driver, and the switching units output a plurality of output display data signals to the electrically coupled pixel units, where each of the switching units includes a plurality of switch units, configuration locations of the switch units in each of the switching units are the same as, and some of the switch units configured at a same configuration location in the different switching units are electrically coupled to different control signal lines and have different wiring lengths, where the wiring lengths are distances between the switch units and the control signal lines.

Abstract: Provided is a gate driving circuit, coupled to a pixel array having multiple gate lines. The gate driving circuit includes multiple shift registers and multiple pull-up transistor, coupled to the pixel array and separately located on two opposite sides of the pixel array. Shift registers located on a same side are sequentially coupled to each other. An nth (n is a positive integer) pull-up transistor includes: a control end, coupled to a control end of a driving transistor of an (n?1)th shift register located on a same side as the nth pull-up transistor; a first end, used to receive a clock signal, where the clock signal is further input to an nth shift register of the shift registers located on an opposite side of the nth pull-up transistor; and a second end, coupled to an nth gate line of the pixel array and used to drive the nth gate line.

Abstract: Some embodiments provide a method for handling failure at one of several peer centralized components of a logical router. At a first one of the peer centralized components of the logical router, the method detects that a second one of the peer centralized components has failed. In response to the detection, the method automatically identifies a network layer address of the failed second peer. The method assumes responsibility for data traffic to the failed peer by broadcasting a message on a logical switch that connects all of the peer centralized components and a distributed component of the logical router. The message instructs recipients to associate the identified network layer address with a data link layer address of the first peer centralized component.

Abstract: Some embodiments provide a network system. The network system includes a first set of host machines for hosting virtual machines that connect to each other through a logical network. The first set of host machines includes managed forwarding elements for forwarding data between the host machines. The network system includes a second set of host machines for hosting virtualized containers that operate as gateways for forwarding data between the virtual machines and an external network. At least one of the virtualized containers peers with at least one physical router in the external network in order to advertise addresses of the virtual machines to the physical router.

Abstract: An anti-interference display panel includes a source driving chip, a switching signal line, a multiplexer, and an anti-interference signal line. The source driving chip is configured to generate a data signal. The switching signal line is configured to transmit a switching signal. The multiplexer is configured to receive the data signal and the switching signal, and is configured to output the data signal according to the switching signal. The anti-interference signal line is configured to transmit an anti-interference signal. An equivalent resistor and an equivalent capacitor are formed on the anti-interference signal line, and resistance of the equivalent resistor is approximate to resistance of a load resistor coupled to the switching signal line, and capacitance of the equivalent capacitor is approximate to capacitance of a load capacitor coupled to the switching signal line.

Abstract: A lens includes a curved surface. A plurality of taper shape structures is formed on the curved surface, and each taper shape structure has at least three substantial flat surfaces. P is less than or equal to 500 nm. H is less than or equal to 500 nm. The P refers to the pitch between two adjacent taper shape structures. The H refers to maximum vertical distance between each taper shape structure and the curved surface.

Abstract: The present embodiment of the invention provides a gate driving circuit and a display apparatus using the gate driving circuit. The gate driving circuit has a plurality of shift registers, and each shift register includes a first output unit, a first pull-down unit, a second output unit, a second pull-down unit, a voltage coupling unit, and a voltage boosting unit. The first output unit is coupled to a node and a first output end. The second output unit is coupled to the node and a second output end. The first pull-down unit is coupled to the first output end and a reference potential. The second pull-down unit is coupled to the second output end and the reference potential. The voltage coupling unit is coupled between the node and the second output end. The voltage boosting unit is coupled to a preset potential, the first output end, and a node and a gate high potential of a shift register at a previous stage.

Abstract: A coaxial cable connector comprises: an inner sleeve which has a first outer flange and a first surface; a nut coaxially arranged with the inner sleeve and comprising a first inner flange and a threaded portion, wherein the threaded portion of the nut is adapted to engage with a threaded surface of a connector of an electronic device; a first inner ring coaxially arranged with the inner sleeve and comprising a ring portion and a plurality of elastic portions, one end of each of the plurality of elastic portions comprising a second outer flange disposed between the ring portion and the first outer flange; and an outer sleeve coaxially arranged with the first inner ring and the inner sleeve, wherein when the outer sleeve moves toward the nut, an engaging bump of the outer sleeve presses the second outer flange to enable the second outer flange to move toward the outer surface of the inner sleeve.

Abstract: A display device comprising an active area and a surrounding area is provided. The active area includes a common electrode for receiving a common voltage. The surrounding area is located at a side of the active area, and the surrounding area includes a shielding metal layer and a surrounding circuit. The shielding metal layer is electrically isolated from the common electrode and receives a shielding voltage. The surrounding circuit and a first shielding metal are overlapped in a vertical projection direction, and the common voltage is power-isolated from the shielding voltage.