Patents by Inventor Kai Wu

Kai Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230387712
    Abstract: An electronic device includes a fuel cell, a first switch, a rechargeable battery, a second switch, and a relay. The fuel cell provides a fuel voltage. The first switch provides the fuel voltage to a first node according to a first control signal. The rechargeable battery provides a battery voltage. The second switch is coupled to the first node and charges the rechargeable battery with the fuel voltage according to a second control signal. The relay provides a voltage of the first node to the load according to the third control signal.
    Type: Application
    Filed: September 14, 2022
    Publication date: November 30, 2023
    Inventors: Che-Jung HSU, Cheng-Huei LIN, Yen-Teh SHIH, Yu-Kai CHEN, Min-Min WU
  • Publication number: 20230387226
    Abstract: A semiconductor structure and a method of forming the same are provided. In an embodiment, an exemplary semiconductor structure includes a gate structure disposed over a channel region of an active region, a drain feature disposed over a drain region of the active region; a source feature disposed over a source region of the active region, a backside source contact disposed under the source feature, an isolation feature disposed on and in contact with the source feature, a drain contact disposed over and electrically coupled to the drain feature, and a gate contact via disposed over and electrically coupled to the gate structure. A distance between the gate contact via and the drain contact is greater than a distance between the gate contact via and the isolation feature. The exemplary semiconductor structure would have a reduced parasitic capacitance and an enlarged leakage window.
    Type: Application
    Filed: July 27, 2023
    Publication date: November 30, 2023
    Inventors: Po-Yu Huang, Chen-Ming Lee, I-Wen Wu, Fu-Kai Yang, Mei-Yun Wang
  • Publication number: 20230386098
    Abstract: A three-dimensional (3D) spectrum situation completion method and device based on a generative adversarial network includes performing graying and coloring preprocessing based on incomplete 3D spectrum situations from historical or empirical spectrum data obtained by a UAV through sampling a target region, obtaining three-channel incomplete 3D spectrum situation maps displayed in colors, forming a training set based on the incomplete 3D spectrum situation maps; training the generative adversarial network based on the training set and obtaining a trained generator network in the generative adversarial network, performing graying and coloring preprocessing based on a measured incomplete 3D spectrum situation obtained by the UAV through sampling a specified measurement region, obtaining a three-channel measured incomplete 3D spectrum situation map displayed in colors, and using the measured incomplete 3D spectrum situation map as input data to the generator network to obtain a three-channel measured complete 3D
    Type: Application
    Filed: January 25, 2022
    Publication date: November 30, 2023
    Applicant: Nanjing University of Aeronautics and Astronautics
    Inventors: Yang HUANG, Qiuming ZHU, Tianyu HU, Qihui WU, Zhiren GONG, Xuan WU, Weizhi ZHONG, Kai MAO, Xiaofei ZHANG, Yiwei LU
  • Publication number: 20230384659
    Abstract: A laser projection apparatus includes a display control circuit, a laser source, a laser source driving circuit, and a light modulation device. The display control circuit includes an algorithm processor and a control processor. The algorithm processor is configured to: determine a gain value ? of each frame of image according to a gray scale value of each frame of image, and transmit N current control signals, M enable signals, and image display data to the control processor. The control processor is configured to: transmit the N current control signals and the M enable signals to the laser source driving circuit; and transmit the image display data to the light modulation device. The light modulation device is configured to modulate beams emitted by the laser source according to the image display data to generate image beams.
    Type: Application
    Filed: August 8, 2023
    Publication date: November 30, 2023
    Applicant: HISENSE LASER DISPLAY CO., LTD
    Inventors: Kai WU, Zhen WANG
  • Patent number: 11826593
    Abstract: The present application provides a fire-fighting apparatus, a box assembly, a battery, a power consumption apparatus, and a method for preparing a battery. The fire-fighting apparatus includes: a pipe, a gas release mechanism, and a blocking structure. The pipe has an air inlet end and an air outlet end, and the air inlet end is configured to be connected to the battery, so that a combustible gas generated in the battery during thermal runaway events is capable of entering the pipe from the box via the air inlet end and being discharged from the pipe via the air outlet end; and the gas release mechanism is configured to be connected to the pipe and release a fire-fighting gas into the pipe when thermal runaway occurs in the battery; and the blocking structure is configured to block the combustible gas and the fire-fighting gas and change a flow direction.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: November 28, 2023
    Assignee: JIANGSU CONTEMPORARY AMPEREX TECHNOLOGY LIMITED
    Inventors: Kai Wu, Zhiming Chen, Boxiang Liao
  • Patent number: 11827925
    Abstract: An embodiment relates to system comprising: (i) a reaction mixture comprises: a) a target nucleic acid molecule; b) a forward primer complementary to a strand of the target nucleic acid molecule, the forward primer comprises a first molecular moiety at a 3? end, wherein the first molecular moiety is non-complementary to the strand of the target nucleic acid molecule; c) a reverse primer complementary to a complementary sequence of the strand of the target nucleic acid molecule, the reverse primer comprises a second molecular moiety at a 3? end, wherein the second molecular moiety is non-complementary to the complementary sequence of the strand of the target nucleic acid molecule; d) a polymerase with 3?-5? exonuclease activity; and (ii a device suitable of detecting an amplification products.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: November 28, 2023
    Assignee: AMPLIWISE INC.
    Inventors: Kai Wu, Mindy Su, Xing Su
  • Patent number: 11831126
    Abstract: A laser projection apparatus includes a laser source, an optical engine, a projection lens, and a circuit system architecture. The circuit system architecture is configured to control the laser source to emit laser beams of three primary colors. The circuit system structure includes: a display control circuit, a first laser chip driving circuit, a second laser chip driving circuit, and a third laser chip driving circuit. The display control circuit is configured to generate three PWM signals and three enable signals. The laser chip driving circuit is electrically connected to the display control circuit, and is configured to receive a PWM signal of a corresponding color and an enable signal of the corresponding color, so as to drive a laser chip of the corresponding color to emit laser beams of the corresponding color.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: November 28, 2023
    Assignee: HISENSE LASER DISPLAY CO., LTD
    Inventors: Kai Wu, Rongrong Cui, Xu Chen
  • Publication number: 20230378256
    Abstract: Transistor gate isolation structures and methods of forming the same are provided. In an embodiment, a device includes: an isolation region; a first gate structure on the isolation region; a second gate structure on the isolation region; and a gate isolation structure between the first gate structure and the second gate structure in a first cross-section, an upper portion of the gate isolation structure having a first concentration of an element, a lower portion of the gate isolation structure having a second concentration of the element, the first concentration different from the second concentration, the lower portion extending continuously along a sidewall of the first gate structure, beneath the upper portion, and along a sidewall of the second gate structure.
    Type: Application
    Filed: August 8, 2022
    Publication date: November 23, 2023
    Inventors: Li-Fong Lin, Wen-Kai Lin, Zhen-Cheng Wu, Chi On Chui
  • Publication number: 20230377921
    Abstract: A system for storing wafer is provided. The system includes a wafer box, an installing member, a detection tube, a control unit, and a detection unit. The wafer box includes an outlet connector and an inlet connector extending a wall of the wafer box. The installing member covers the wafer box to form a sealed receiving room. Two ends of the detection tube are coupled to the outlet connector and the inlet connector. The control unit are configured to output a first control signal to the detection unit. The detection unit includes a first sensor arranged in the detection tube. The first sensor is configured to detect a property of gas to obtain data of an environment where the wafer is stored upon the first control signal. A related system for monitoring pollution of wafer is also provided.
    Type: Application
    Filed: May 19, 2023
    Publication date: November 23, 2023
    Inventors: CHUN-CHUNG CHEN, YU-WEI WU, CHUN-KAI HUANG, TANG-YU CHANG
  • Publication number: 20230374660
    Abstract: A substrate processing system is provided having a processing chamber. The processing chamber includes a lid plate, one or more chamber sidewalls, and a chamber base that collectively define a processing volume. An annular plate is coupled to the lid plate, and an edge manifold is fluidly coupled to the processing chamber through the annular plate and the lid plate. The substrate processing system includes a center manifold that is coupled to the lid plate.
    Type: Application
    Filed: May 17, 2022
    Publication date: November 23, 2023
    Inventors: Harpreet SINGH, Jallepally RAVI, Zubin HUANG, Manjunatha KOPPA, Sandesh YADAMANE, Srinivas TOKUR MOHANA, Shreyas PATIL SHANTHAVEERASWAMY, Kai WU, Peiqi WANG, Mingrui ZHAO
  • Publication number: 20230380148
    Abstract: A method for fabricating a semiconductor device includes the steps of first providing a substrate having an one time programmable (OTP) device region, forming a shallow trench isolation (STI) in the substrate, forming a first doped region adjacent to the STI, removing part of the STI, and then forming a first gate structure on the substrate and the STI. Preferably, the first gate structure includes a high-k dielectric layer on the substrate and a gate electrode on the high-k dielectric layer, in which the high-k dielectric layer comprises a first L-shape.
    Type: Application
    Filed: June 20, 2022
    Publication date: November 23, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Hsing Lee, Chun-Hsien Lin, Chih-Kai Kang, Ting-Hsiang Huang, Chien-Liang Wu, Sheng-Yuan Hsueh, Chi-Horn Pai
  • Publication number: 20230377943
    Abstract: Semiconductor structures and methods are provided. An exemplary method according to the present disclosure includes providing a workpiece including a semiconductor fin protruding from a substrate, a first placeholder gate and a second placeholder gate over channel regions of the semiconductor fin, and a source/drain feature disposed between the channel regions. The method also includes removing a portion of the first placeholder gate and a portion of the substrate directly disposed thereunder to form an isolation trench, forming a dielectric feature in the isolation trench, replacing the second placeholder gate with a metal gate stack, selectively recessing the dielectric feature, forming a first capping layer over the metal gate stack and a second capping layer over the recessed dielectric feature, and forming a source/drain contact over and electrically coupled to the source/drain feature.
    Type: Application
    Filed: May 19, 2022
    Publication date: November 23, 2023
    Inventors: I-Wen Wu, Po-Yu Huang, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
  • Publication number: 20230378270
    Abstract: A method of semiconductor fabrication includes providing a semiconductor structure having a substrate and first, second, third, and fourth fins above the substrate. The method further includes forming an n-type epitaxial source/drain (S/D) feature on the first and second fins, forming a p-type epitaxial S/D feature on the third and fourth fins, and performing a selective etch process on the semiconductor structure to remove upper portions of the n-type epitaxial S/D feature and the p-type epitaxial S/D feature such that more is removed from the n-type epitaxial S/D feature than the p-type epitaxial S/D feature.
    Type: Application
    Filed: July 27, 2023
    Publication date: November 23, 2023
    Inventors: I-Wen Wu, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang, Chun-An Lin, Wei-Yuan Lu, Guan-Ren Wang, Peng Wang
  • Patent number: 11825505
    Abstract: A channel measurement method, a terminal device, and a network side device are provided. The channel measurement method is applied in a user equipment (UE) and comprises: receiving M measurement reference signals sent by a network side device on the measurement resource, M being an integer greater than 1; the measurement resource comprising N measurement sub-resources; the measurement sub-resources being continuous in a time domain and a frequency domain; N being an integer greater than 1.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: November 21, 2023
    Assignee: VIVO MOBILE COMMUNICATION CO., LTD.
    Inventors: Kai Wu, Xueming Pan, Dajie Jiang
  • Publication number: 20230369428
    Abstract: Embodiments provide a two-tiered trench isolation structure under the epitaxial regions (e.g., epitaxial source/drain regions) of a nano-FET transistor device, and methods of forming the same. The first tier provides an isolation structure with a low k value. The second tier provides an isolation structure with a higher k value, with material greater density, and greater etch resistivity than the first tier isolation structure.
    Type: Application
    Filed: July 22, 2022
    Publication date: November 16, 2023
    Inventors: Chih-Hung Sun, Wen-Kai Lin, Che-Hao Chang, Zhen-Cheng Wu, Chi On Chui
  • Publication number: 20230369418
    Abstract: A semiconductor structure and a method of forming the same are provided. An exemplary method of forming the semiconductor structure includes receiving a workpiece including a fin structure over a front side of a substrate, recessing a source region of the fin structure to form a source opening, extending the source opening into the substrate to form a plug opening, forming a semiconductor plug in the plug opening, planarizing the substrate to expose the semiconductor plug from a back side of the substrate, performing a first wet etching process to remove a portion of the substrate, performing a pre-amorphous implantation (PAI) process to amorphize a rest portion of the substrate, performing a second wet etching process to remove the amorphized rest portion of the substrate to form a dielectric opening, depositing a dielectric layer in the dielectric opening, and replacing the semiconductor plug with a backside source contact.
    Type: Application
    Filed: July 19, 2023
    Publication date: November 16, 2023
    Inventors: Po-Yu Huang, Chen-Ming Lee, I-Wen Wu, Fu-Kai Yang, Mei-Yun Wang
  • Publication number: 20230369113
    Abstract: A method of forming a structure on a substrate includes forming a tungsten nucleation layer within at least one opening within a multi-tier portion of a substrate. The method includes exposing the nucleation layer a nitrogen trifluoride-containing gas to inhibit growth of the nucleation layer at narrow portions within the at least one opening. The method includes exposing the at least one opening to the tungsten-containing precursor gas to form a fill layer over the nucleation layer within the at least one opening. The method includes exposing the at least one opening of the substrate to the nitrogen trifluoride-containing gas or a nitrogen-containing plasma to inhibit growth of portions of the fill layer along the at least one opening.
    Type: Application
    Filed: April 13, 2023
    Publication date: November 16, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Peiqi WANG, Kai WU
  • Patent number: 11818891
    Abstract: A memory device includes a staircase region and an array region, along a first lateral direction; a wall structure in the staircase region; and a first separation structure in the array region and arranged along the first lateral direction with the wall structure. The wall structure includes dielectric pairs of a first dielectric layer and a second dielectric layer stacked in the staircase region. The first separation structure is vertically through a stack structure in the array region. The stack structure includes pairs of the first dielectric layer and an electrode layer.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: November 14, 2023
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Kai Han, Yali Guo, Zhipeng Wu, Lu Zhang, Hang Yin, Simin Liu, Bo Xu
  • Publication number: 20230359758
    Abstract: The present disclosure relates to privacy protection in a search process. According to a method, a target emotion vector is extracted from a search interaction, the target emotion vector representing emotional information in the search interaction. Respective emotion distances between the target emotion vector and respective emotion vectors associated with a plurality of text clusters are determined. The plurality of text clusters is clustered from a dictionary of text elements. A first number of text clusters are selected from the plurality of text clusters based on the determined respective emotion distances. The first number of text clusters have emotion distances larger than at least one unselected text cluster among the plurality of text clusters. A plurality of confused search interactions are constructed for the search interaction based on the first number of text clusters, and the plurality of confused search interactions are performed.
    Type: Application
    Filed: May 3, 2022
    Publication date: November 9, 2023
    Inventors: Jin Wang, Lei GAO, A PENG ZHANG, Kai Li, Jun Wang, Xiao Ming Ma, Xin Feng Zhu, Geng Wu Yang
  • Publication number: 20230361919
    Abstract: Embodiments of this application provide an Msg3 transmission method and apparatus, a device, and a storage medium. The method includes: receiving, by a terminal device, Msg3 repetition indication information transmitted by a network device, and determining a configuration parameter for Msg3 repetition; and performing Msg3 repetition according to the Msg3 repetition indication information.
    Type: Application
    Filed: July 14, 2023
    Publication date: November 9, 2023
    Applicant: Vivo Mobile Communication Co,. Ltd.
    Inventors: Kun YANG, Kai WU, Xueming PAN, Na LI